International Business Machines Corporation

John Gow, 3rd

Richard W Noth

Herman S Hoffman

Earl Stephans

An improved package for semiconductor chips, and method of forming the package are provided. The package includes a lead frame having a central chip bonding portion and first and second sets of interdigitaled fingers. The inner ends of the first set of fingers terminate at a distance from the central chip bonding portion closer than the inner ends of the fingers of the second set at fingers. A semiconductor chip, having input/output pads is bonded to the central chip bonding portion. A first set of wires directly couples respective input/output pads on the chip to the first set of fingers. A second set of wires couples respective input/output pads on the chip with the second set of fingers. Each of the wires of the second set of wires has a first segment extending from its respective input/output pad to an intermediate bonding region, and a second segment extending from the intermediate bonding region to its respective finger of the second set of fingers.

Lead frame-chip package with improved configuration

According to the present invention, an improved chip and leadframe package assembly and method of making the same is provided. The package assembly is comprised of a metal leadframe having a chip bond pedestal centrally located and a plurality of discrete leads surrounding the pedestal. An I/C (integrated circuit) semiconductor chip is mounted on the pedestal, the chip having a plurality of connection or bonding pads disposed around the periphery. An interposer having a layer of dielectric material and discrete metal lines formed thereon is mounted on an apron of the chip bonding pedestal between the location of the chip and the inner discrete leads of the leadframe. Connections are provided between the bonding pads on the chip and the respective lines on the interposer and connections are also provided between the fingers and the respective lines on the leadframe. Additionally, the interposer also preferably includes at least one voltage bus line formed thereon having a portion adjacent at least one edge of the chip for connection of any of the chip bond pads thereto. Further, the pedestal also preferably includes radially extending conducting arms suitable for providing both electrical ground connection and a heat dissipation path.

High performance versatile thermally enhanced IC chip mounting

A method for laser trimming of resistors which includes sputter depositing or vaporizing resistor material in a limited area but the resistor geometry and trimming location is designed to achieve a maximum resistor trimming range with a minimum substrate area occupied by the resistor. A cermet resistor is fabricated on a metallized ceramic substrate with the resistor having a low length to width ratio. A laser cut is used to provide resistor values greater than 250 ohms and up to 16000 ohms.

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Milton, VT, United States of America

John Gow, 3rd