Triconex Corporation

Invensys Systems, Inc.

John G Gabler

David C Rasmussen

Ronald L Popp

A system for validating communications between a plurality of processors is disclosed. The system includes a plurality of loop back paths, and each of the loop back paths is coupled to a corresponding one of the plurality of processors. In addition, each loop back path is configured to attenuate one of a plurality of signals transmitted from each of the corresponding ones of the plurality of processors so as to generate a plurality of loop back signals. A plurality of signal transmission paths are configured to carry a corresponding one of the plurality of signals from one of the plurality of processors to another of the plurality of processors, and a plurality of comparators compare the plurality of loop back signals to the plurality of transmission signals so as to enable the validity of each of the plurality of signals to be assessed.

System and method for validating channel transmission

A system and method for synchronizing a plurality of main processors. At a first time and in response to a first time reference, a first rendezvous signal is sent from a first to a second of the plurality of main processors. At a second time, and in response to a second time reference, a second rendezvous signal is sent from the second of the plurality of main processors, to the first of said plurality of main processors. After the first rendezvous signal is received by the second of the plurality of main processors and the second rendezvous signal is received by the first of said plurality of main processors, substantially simultaneous scanning of control information is initiated by the first and second of the plurality of main processors. In variations, a difference between the first and second times signals a fault condition.

Method and apparatus for processing control using a multiple redundant processor control system

A controller for executing an application program to process control information related to control elements includes one or more main processors that each run the application program; a time synchronization system that synchronizes the time clocks of the main processors; and a voting system that exchanges information between the main processors and compares the information received from the other main processors. In addition, the controller includes one or more rendezvous signals sent to and received by the main processors as well as a mechanism for updating the time clocks based on a clocking midpoint of all processor signals.

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Irvine, CA, United States of America

John G Gabler