Data General Corporation

Other

John F Pilat

Thomas M Jones

Richard G Bratt

David H Bernstein

Stephen I Schleimer

Walter A Wallach, Jr

Steven J Wallach

Craig J Mundie

Richard A Belgard

Michael S Richmond

Gerald F Clancy

Brett L Bachman

Edward S Gavrin

David A Farber

John K Ahlstrom

Douglas M Wells

Lawrence H Katz

Ronald H Gruner

James T Nealon

Gary Davidian

Paul Bowden

Eric C Hamilton

David B Kinder

David L Houseman

Philip L Schwartz

Stuart Warnsman

Nicholas Zoda, Jr

J Theodore Compton

Anastasia J Czerniakiewicz

A communication protocol available to any type module on the computer bus. Application programs are treated as clients or servers. A serveport is created in the server module. A client issues a connect request to the server identifying the serveport. The server assigns a N-slot TID capability to identify, describe and protect a storage location for receiving a start buffer from the client and sends the N-slot TID to the client to establish a connection. The start buffer includes a TID list which permits the client and server to reliably communicate back and forth. Once a connection has been established, data can be moved between the server and the client. High-level instructions and commands are sent as data through these connections. After the communication has been completed, the connection can be disconnected by the client or broken by the server.

Capability based communication protocol

Apparatus in a digital computer system capable of performing a call operation and a return operation for obtaining addresses of data from names representing the data. Each name is permanently associated with a procedure containing instructions to which the digital computer system responds. Each name further corresponds to a name table entry which is permanently associated with the same procedure. The corresponding name table entry for a name specifies how a base address and a displacement are to be derived using a plurality of current base addresses. The values of these addresses change only when the computer system executes a call operation suspending a current execution of a procedure and commencing another current execution or a return operation terminating the current execution and resuming the execution which was suspended to commence the terminated execution. The operation of resolving a name, i.e., obtaining the address of the data represented by the name, is performed by name interpretation apparatus in processors of the data processing system. In response to a name, the name interpretation apparatus locates the name table entry corresponding to the name fetches the name table entry, calculates the base address and the displacement using the name table entry and the current architectural base addresses, and then adds the base address to the displacement to obtain the address of the data represented by the name.

Digital data processing system incorporating apparatus for resolving

A digital computer system having a memory system organized into procedure and data objects, each having a unique identifier code and an access control list, for storing items of information and a processor for processing data in response to instructions. The instructions contain operation codes and names representing data. Each name corresponds to a name table entry in a name table which contains information from which the processor determines the location and the format for the data. The name table entry specifies a base address of one of a set thereof which change value only when a call or a return instruction is executed. A name interpretation system fetches a name table entry, calculates the base address and a displacement using the name table entry and the current architectural base address and adds the base address to the displacement to form the address of the data represented by the name.

Digital data processing system having a uniquely organized memory system

Encachement apparatus consisting of first and second caches responsive to first and second keys, respectively, for outputting first and second data therefrom. In one embodiment, the second cache which includes a stack having a plurality of frames, outputs data contained in a current frame thereof in response to a second key which is obtained from the first cache. The data outputted from each cache is received substantially simultaneously at a combiner which combines such data to produce the desired third data from the dual cache system.

Encachement apparatus using two caches each responsive to a key for

A digital computer system having a memory system organized into objects for storing items of information and a processor for processing data in response to instructions. An object identifier code is associated with each object. The objects include procedure objects and data objects. The procedure objects contain procedures including the instructions and name tables associated with the procedures. The instructions contain operation codes and names representing data. Each name corresponds to a name table entry in the name table associated with the procedure. The name table for a name contains information from which the processor may determine the location and the format for the data (e.g., an operand) represented by the name.

Encachement apparatus for use in a processing unit which is responsive to data items which include first and second component values, while values change in response to first and second operations, respectively, of the processing unit. The encachement apparatus comprises first and second caches for storing and outputting first and second component values of such data items which values are combined to form the data items involved.

Encachement apparatus using multiple caches for providing multiple

A digital computer system in which data storage is referred to by a descriptor comprising an object number denoting a variable-length block of storage, an offset indicating how far into that block a desired data item begins, and a length field denoting the length of the desired data item. Separate means exist for manipulating each of the three descriptor portions, thus facilitating repetitive operations on related or contiguous operands. Various levels of microcode control are included. Each level of microcode control has its own stack, facilitating interrupts between levels. Stacks are duplicated in 'secure stacks' in memory to protect against loss of state data from the stacks.

Digital data processing system with tripartite description-based

Apparatus in a digital computer system for encaching data stored in the computer system's memory in a cache internal to the computer system's processor. The processor executes procedures (sequences of instructions). Data processed during an execution of a procedure is represented by operands associated with the procedure. Certain of the operands designate encacheable data items associated with each execution of the procedure. The values of the encacheable data items do not change for the duration of the execution. The operands designating encacheable data do so by means of codes specifying the designated encacheable items. The processor includes a cache for storing the encacheable items. The cache responds to a code specifying an encacheable item by outputting the value of the encacheable item specified by the code. The processor further includes cache loading apparatus for loading the encacheable items into the cache. The operations executed by the processor include a call operation which commences an execution of a procedure. The cache loading apparatus responds to the call operation by loading the encacheable items for the execution being commenced into the cache. The encacheable items include pointers to arguments for each execution of a procedure. The pointers are stored in the frame corresponding to the execution at negative offsets from the frame pointer. The codes in the operands specify the negative offsets.

Improved apparatus for encaching data whose value does not change during

A digital computer system including a memory and a processor. The memory operates in response to memory commands received from the processor. Items of data stored in the memory include instructions to which the processor responds. Each instruction contains an operation code which belongs to one of several sets of operation codes. The meaning of a given operation code is determined by the operation code set to which the instruction belongs. Some of the instructions also contain names representing items of data used in the operation specified by the operation code. The processor includes an operation code decoding system which decodes the operation code as required for the instruction set to which it belongs, a name resolution system for deriving the address of the data item represented by a name from the name using an architectural base address contained in the name resolution system, and a control system which controls the operation of the processor. The processor performs a call operation and a return operation. Only the call operation and the return operation may change the current architectural base address. The memory further contains name table entries associated with the names. Each name table entry contains information used by the name resolution system when it resolves a name.

Digital computer system including apparatus for resolving names

Apparatus and methods for the calculation of addresses of data items in digital computer systems which perform call and return operations. In the digital computer systems of the invention, items of data called immediate names represent other items of data and specify how the address of the represented item is to be calculated. Certain immediate names represent items of data whose addresses are calculated using linkage pointers. Such an immediate name specifies the linkage pointer to be used in the calculation. Linkage pointers are pointers whose values remain unchanged during an execution of a procedure. When the digital computer system's processor executes the call operation, the processor places the addresses represented by the linkage pointers in internal registers. When the processor receives an immediate name representing an item whose address is calculated using a linkage pointer, the processor uses the address in the internal registers which is represented by the linkage pointer specified in the immediate name. Also disclosed are apparatus for performing a call operation wherein the call instructions include a neighborhood call instruction which contains a literal value which specifies the offset of the procedure being called from the neighborhood call instruction and apparatus for use in a system having object-based addressing which allows the use of short pointers to represent addresses in the same object as the one containing the pointer.

Apparatus and methods for deriving addresses of data using painters

A digital computer uses a memory which is structured into objects, which are blocks of storage of arbitrary length, in which data items are accessed by descriptors which for a desired data item specify the object, the offset into that object, and the length of the data object. The computer system of the present invention further provides the ability to execute any of a plurality of dialects of internal instructions, the repertoire of such dialects being virtually infinite, since there is the ability to load a supporting microcode during operation as needed.

Digital computer system having descriptors for variable length

A digital data processing system has a memory organized into objects containing at least operands and instructions. Each object is identified by a unique and permanent identifier code which identifies the data processing system and the object. The system utilizes unique addressing mechanisms the addresses of which have object fields, offset fields and length fields for specifying the location and the total number of bits of an addressed object. The system uses a protection technique to prevent unauthorized access to objects by users who are identified by a subject number which identifies the user, a process of the system for executing the user's procedure, and the type of operation of the system to be performed by the user's procedure. An access control list for each object includes an access control list entry for each subject having access rights to the object and means for confirming that a particular active subject has access rights to a particular object before permitting access to the object.

Data processing system having addressing mechanisms for processing

A data processing system having a flexible internal structure, protected from and effectively invisible to users, with multilevel control and stack mechanisms and capability of performing multiple, concurrent operations, and providing a flexible, simplified interface to users. The system is internally comprised of a plurality of separate, independent processors, each having a separate microinstruction control and at least one separate, independent port to a central communications and memory node. The communications and memory node is an independent processor having separate, independent microinstruction control and comprised of a plurality of independently operating, microinstruction controlled processors capable of performing multiple, concurrent memory and communications operations. Addressing mechanisms allow permanent, unique identification of information and an extremely large address space accessible and common to all such systems. Addresses are independent of system physical configuration. Information is identified to bit granular level and to information type and format. Protection mechanisms provide variable access rights associated with individual bodies of information. User language instructions are transformed into dialect coded, uniform, intermediate level instructions to provide equal facility of execution for all user languages. Operands are referred to by uniform format names which are transformed, by internal mechanisms transparent to users, into addresses.

Digital data processing system having unique addressing means and means

A method for executing call and return instructions in a digital computer system operating under control of microcode. The microcode may specify calls to and returns from sequences of microinstructions. A call microinstruction sequence corresponds to the call instruction. The call microcode in turn calls other microinstruction sequences for deriving pointers representing the location of the called procedure and of arguments from operands in the call instruction. As the call microcode obtains each argument pointer, it places the pointer on the stack. After it has obtained all of the argument pointers, it passes the pointer to the called procedure and a pointer to the argument pointers to a general call microinstruction sequence. That microinstruction sequence locates the called procedure, makes a new frame including the argument pointers, and saves the state necessary to resume execution of the call microinstruction sequence itself. It then obtains the state necessary to commence execution of the called procedure and causes execution of that procedure to commence. The microcode corresponding to the return instruction restores both the state necessary to resume execution of the calling procedure and the state necessary to resume execution of the call microinstruction sequence. When it resumes execution, the call microinstruction sequence completes the return operation.

Method of performing a call operation in a digital data processing

A system for performing operations on data items in digital computer systems in which the instructions may not specify internal registers in the processor as destinations of data received from memory or sources of data provided to memory. The system includes a result memory, apparatus for executing operations, instructions containing operation codes which specify that the result memory is to be a source of data to be operated on by the apparatus for executing operations, and control apparatus responsive to the operation codes for controlling the apparatus for executing operations. The result memory stores only the results of previous operations and may serve only as an input to the apparatus for executing instructions. The apparatus for executing operations may receive items to be operated on from either the computer system memory or the result memory. When an operation code specifies that the apparatus for executing operations receive an input from the result register, the control apparatus causes the operation execution apparatus to select the contents of the result memory as an input. Operation codes may further specify that the result be stored in the system memory as well as in the result memory.

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Raleigh, NC, United States of America

John F Pilat