Sun Microsystems, Inc.

John F MacDonald

Alan C Rogers

Raghunand Bhagwan

Weize Xie

Eileen H You

Daniel G Schweikert

A structure includes a substrate, first and second signal lines above the substrate, where unused substrate surface area exists between the first and second signal lines, and a first shield line in the unused substrate surface area. To define the first shield line, the signal line layout which includes the first and second signal lines is defined. Any areas which are not signal lines are then defined as unused areas of the substrate. The shield lines including the first shield line are then defined in portions of the unused areas of the substrate. In this manner, shield lines are automatically designed at every available location without requiring any allocation of substrate surface area.

Metal region for reduction of capacitive coupling between signal lines

A technique measuring accuracy of parasitic capacitance extraction defines the error in an extracted total net parasitic capacitance intended for timing analysis as a sum of the errors in the extracted values of the individual capacitance elements, with the error for each element being influenced by a weight factor. Similarly, the technique defines an error in the extracted value of a crosstalk factor for the net of interest as a difference between the errors in the extracted values of the individual capacitance elements, with the error in each element being influenced by a weight factor. For signal timing and crosstalk analyses, the weight factors allow a designer to focus calibration of the extraction tool on the capacitive element having the highest weight factor.

Method of measuring the accuracy of parasitic capacitance extraction

A low-loss, low-inductance metal interconnect for an electrical signal in a microcircuit comprises a plurality of spaced-apart generally parallel metal interconnect lines disposed in a plane over an insulating layer. The metal interconnect lines are interleaved with and electrically insulated from a plurality of spaced-apart generally parallel metal lines disposed in the plane. The metal interconnect lines together comprise a signal interconnect path, and the metal lines are coupled to a fixed voltage potential, such as ground.

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Lake Oswego, OR, United States of America

John F MacDonald