Intel Corporation

Micron Technology Incorporated

John Egler

Ali Khakifirooz

Sean Stephen Eilert

Aliasgar S Madraswala

Yogesh B Wakchaure

Robert Melcher

Camila Jaramillo

Netra Mahuli

Renjie Chen

An apparatus comprises a plurality of memory cells; a plurality of sense circuits, a sense circuit comprising a sense node selectively coupled to a bitline coupled to a first cell of the plurality of memory cells; and a controller to transpose a value indicative of a voltage of the first cell to the sense node; isolate the sense node from the bitline; and calibrate a parameter for the sense circuit based on outputs of the sense circuit for each of a plurality of different applied values of the parameter.

Automatic read calibration operations

Methods and systems to selectively refresh a single bit per cell non-volatile memory cell to reduce memory cell errors. In an embodiment, a memory device scans its memory cells, performing a multi-level read on memory cells in a single bit per cell mode. Depending on the state sensed, the cell is refreshed to a correct state if necessary. In one embodiment, the memory scan is appended to a user erase operation, a flash block is swapped with another bock if the state sensed indicates charge gain, and a flash cell is programmed up if the state sensed indicates charge loss.

Selective refresh of single bit memory cells

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Folsom, CA, United States of America

John Egler