G-2 Networks, Inc.

John Ebner

William Pierce Evans

Hao Tang

Eric Naviasky

Anthony Caviglia

Patrick G Farrell

Hugh Thompson

A clock recovery circuit that can be used for recovering a clock signal from a data stream having a high data rate. The clock recovery circuit has a phase interpolator and non-linear digital to analog converters. These circuits are used to interpolate between the phases produced by a voltage controlled oscillator. A determination to advance or hinder a currently selected phase can be made using an up/down detector, a divider, and control logic. The divider can divide not only the up and down pulses produced by the up/down detector, but also the clock frequency. By dividing the clock frequency, the control logic can be designed using CMOS logic circuits.

Growing community of inventors

Baltimore, MD, United States of America

John Ebner