Computer Power Systems Corp.

John D Faivre

Robert D Catiller

Fah Rakpongs

Power measuring apparatus including a first multiplexor having its inputs responsive to the polyphase voltage and current inputs being measured. The multiplexor reads these inputs in sequence based on address signals provided by a program controlled microprocessor. The output of the multiplexor is coupled to an RMS to DC converter, the output of which is coupled to a second multiplexor. The voltage inputs are coupled to a voltage averaging device, the output thereof being coupled to additional inputs of the second multiplexor, the output of the second multiplexor being coupled to the microprocessor via an analog to digital converter. The microprocessor reads and compares the voltage output from the averaging circuit and the corresponding voltage at the output of the converter and generates a correction factor and responds thereto. The microprocessor to periodically adjusts the digital value of the voltage from the averaging circuit in response to the correction factor, the adjusted signal being coupled to display means for visual readout. A third multiplexor is provided to detect polyphase voltages and currents. The outputs of the third multiplexor are coupled under the control of the microprocessor to an analog multiplier in a time shared manner via voltage and currents scaling devices such that each phase voltage and corresponding current is simultaneously coupled to the multiplier. The output of the multiplier is coupled to a low pass filter, the output of which corresponds to the kilowatt power consumed for that phase. The microprocessor is capable of calculating a system power factor.

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Glendora, CA, United States of America

John D Faivre