Nitronex Corporation

Macom Technology Solutions Holdings, Inc.

International Rectifier Corporation

Infineon Technologies Americas Corp.

John Claassen Roberts

Edwin Lanier Piner

Pradeep Rajagopal

Kevin J Linthicum

Allen W Hanson

James W Cook, Jr

Jerry Wayne Johnson

Robert Joseph Therrien

Walter H Nagy

Sameer Singhal

Ricardo M Borges

Apurva D Chaudhari

Andrei Vescan

Jeffrey D Brown

Wayne Mack Struble

Alan W Hanson

Structures and methods for isolating semiconductor devices and improving device reliability under harsh environmental conditions are described. An isolation region may be formed by ion implantation in a region of semiconductor surrounding a device. The implantation region may extend into streets of a wafer. A passivation layer may be deposited over the implantation region and extend further into the streets than the isolation region to protect the isolation region from environmental conditions that may adversely affect the isolation region.

Device isolation design rules for HAST improvement

III-nitride materials are generally described herein, including material structures comprising III-nitride material regions and silicon-containing substrates. Certain embodiments are related to gallium nitride materials and material structures comprising gallium nitride material regions and silicon-containing substrates.

III-nitride semiconductor structures comprising low atomic mass species

Semiconductor materials including a gallium nitride material region and methods associated with such structures are provided. The semiconductor structures include a strain-absorbing layer formed within the structure. The strain-absorbing layer may be formed between the substrate (e.g., a silicon substrate) and an overlying layer. It may be preferable for the strain-absorbing layer to be very thin, have an amorphous structure and be formed of a silicon nitride-based material. The strain-absorbing layer may reduce the number of misfit dislocations formed in the overlying layer (e.g., a nitride-based material layer) which limits formation of other types of defects in other overlying layers (e.g., gallium nitride material region), amongst other advantages. Thus, the presence of the strain-absorbing layer may improve the quality of the gallium nitride material region which can lead to improved device performance.

Gallium nitride materials and methods associated with the same

Parasitic channel mitigation via back side implantation

III-nitride semiconductor structures comprising spatially patterned implanted species

Parasitic channel mitigation via reaction with active species

Parasitic channel mitigation using rare-earth oxide and/or rare-earth nitride diffusion barrier regions

Parasitic channel mitigation in III-nitride material semiconductor structures

Semiconductor structures including one, or more, III-nitride material regions (e.g., gallium nitride material region) and methods associated with such structures are provided. The III-nitride material region(s) advantageously have a low dislocation density and, in particular, a low screw dislocation density. In some embodiments, the presence of screw dislocations in the III-nitride material region(s) may be essentially eliminated. The presence of a strain-absorbing layer underlying the III-nitride material region(s) and/or processing conditions can contribute to achieving the low screw dislocation densities. In some embodiments, the III-nitride material region(s) having low dislocation densities include a gallium nitride material region which functions as the active region of the device. The low screw dislocation densities of the active device region (e.g., gallium nitride material region) can lead to improved properties (e.g., electrical and optical) by increasing electron transport, limiting non-radiative recombination, and increasing compositional/growth uniformity, amongst other effects.

III-nitride materials including low dislocation densities and methods associated with the same

Gallium nitride material devices and related processes are described. In some embodiments, an N-face of the gallium nitride material region is exposed by removing an underlying region.

Gallium nitride material processing and related device structures

Gallium nitride material transistors and methods associated with the same are provided. The transistors may be used in power applications by amplifying an input signal to produce an output signal having increased power. The transistors may be designed to transmit the majority of the output signal within a specific transmission channel (defined in terms of frequency), while minimizing transmission in adjacent channels. This ability gives the transistors excellent linearity which results in high signal quality and limits errors in transmitted data. The transistors may be designed to achieve low ACPR values (a measure of excellent linearity), while still operating at high drain efficiencies and/or high output powers. Such properties enable the transistors to be used in RF power applications including third generation (3G) power applications based on W-CDMA modulation.

Gallium nitride material transistors and methods associated with the same

Gallium nitride material-based semiconductor structures are provided. In some embodiments, the structures include a composite substrate over which a gallium nitride material region is formed. The gallium nitride material structures may include additional features, such as strain-absorbing layers and/or transition layers, which also promote favorable stress conditions. The reduction in stresses may reduce defect formation and cracking in the gallium nitride material region, as well as reducing warpage of the overall structure. The gallium nitride material-based semiconductor structures may be used in a variety of applications such as transistors (e.g. FETs) Schottky diodes, light emitting diodes, laser diodes, SAW devices, and sensors, amongst others devices.

Gallium nitride material structures including substrates and methods associated with the same

Growing community of inventors

Hillsborough, NC, United States of America

John Claassen Roberts