Stmicroelectronics Gmbh

John Christopher Pritiskutch

Richard Hildenbrandt

Craig J Rotay

First and second transistors with different electrical characteristics are supported by a substrate having a first-type dopant. The first transistor includes a well region within the substrate having the first-type dopant, a first body region within the well region having a second-type dopant and a first source region within the first body region and laterally offset from the well region by a first channel. The second transistor includes a second body region within the semiconductor substrate layer having the second-type dopant and a second source region within the second body region and laterally offset from material of the substrate by a second channel having a length greater than the length of the first channel. A gate region extends over portions of the first and second body regions for the first and second channels, respectively.

MOSFET devices with asymmetric structural configurations introducing different electrical characteristics

In a general aspect, an integrated circuit package includes a first electrode and a second electrode on a support substrate. The first electrode and the second electrode are configured to be electrically coupled to a voltage differential. A dendritic migration of a migratory species can develop under the voltage differential and a non-hermetic environment. The dendritic migration is interrupted by a floating electrical barrier mounted onto the support substrate between the first electrode and the second electrode. The electrical barrier includes a dam for preventing the metal migration. The dam has a height approximately equal to or greater than the largest dimension of a single atom of the migratory species. The first electrode and the second electrode can be mounted on the same side of the support substrate, or on two opposite sides of the support substrate.

Preventing shorting dendritic migration between electrodes

Pre-migration of metal ions is achieved in a controlled manner to form a migrated metalover which an inhibitor is applied to prevent further migration. In a semiconductor circuit, pre-migration of metal ions is achieved by exposing a joined metal system to water, oxygen and an electrical field in a controlled manner. Conductors, joined to electrically isolating materials, are exposed to electrical fields in such a manner as to form one or more anodes to corresponding cathodes, thus liberating metal ions. The metal ions are then allowed to migrate in a controlled manner from the anode toward the cathode to form a pre-migrated metal. Finally, an inhibitor is applied on top of the pre-migrated metal to prevent further migration.

Method and system for pre-migration of metal ions in a semiconductor package

A circuit includes a direct current (DC) gate termination impedance having an impedance for DC signals higher than a maximum impedance DC at which dendrite growth occurs in the circuit, and a radio frequency (RF) gate termination impedance having an impedance for RF signals lower than a maximum impedance at which RF stability for the circuit is maintained for an application.

Dendrite resistant input bias network for metal oxide semiconductor field effect transistor (MOSFET) devices

According to an embodiment of the present disclosure, a method of pre-migrating metal ions is disclosed. A metal in a semiconductor configuration is exposed to water and oxygen to yield metal ions. The metal couples a conductor to another material. The metal and the conductor are exposed to an electrical field in such a manner that one or both of the metal and the conductor becomes an anode to a corresponding cathode. The metal ions are then allowed to migrate from the anode to the cathode to form a migrated metal. Finally, a migration inhibitor is applied on top of the migrated metal to prevent further migration.

Method for pre-migration of metal ions in a semiconductor package

A semiconductor indicator for quantitatively diagnosing voltage conditions in high power transistor devices is provided. The semiconductor indicator includes a first transistor and a second transistor, where an electrically active periphery of the second transistor is less than an electrically active periphery of the first transistor. The transistors are thermally coupled to one another and may be in close proximity. The second transistor detects the voltage of a node on the first transistor and may be monitored by infrared imaging. The breakdown voltage characteristic of the second transistor may not substantially change as the temperature in the first transistor increases. An optional control circuit monitors and detects the output voltage of the first transistor.

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Orwigsburg, PA, United States of America

John Christopher Pritiskutch