Texas Instruments Corporation

Texas Instruments Incorporated Deutschland, Gmbh

John Christian Vogt

Brent Alan McDonald

Brett E Smith

Filippo Marino

Salvatore Giombanco

Abidur Rahman

Thomas A Schmidt

Joseph Michael Leisten

Ananthakrishnan Viswanathan

Michael Ryan Hanschke

Maxim James Franke

Yalong Li

Chris Michael Franklin

Tom Truong

Kee Chee Tiew

Robert Remmers

A circuit includes a first driver, a second driver, and a burst mode control circuit coupled to the first and second drivers. The burst mode control circuit is configured to implement a burst mode operation having a burst soft-on portion and a burst portion. During the soft-on portion of the burst mode operation, the burst mode control circuit is configured to cause the first and second drivers to produce a first set of pulses of increasing pulse width. During the burst portion of the burst mode operation, the burst mode control circuit is configured to cause the first and second drivers to produce a second set of pulses of a constant pulse width.

Burst mode operation for a resonant converter

At least some aspects of the present disclosure provide for a circuit. In one example, the circuit includes a logic circuit having multiple inputs and multiple outputs, a calculated discontinuous conduction (DCM) (TDCM) timer having an input coupled to one of the logic circuit outputs and an output coupled to one of the logic circuit inputs, an on-time (TON) timer having an input coupled to one of the logic circuit outputs and an output coupled to one of the logic circuit inputs, and a hysteresis timer having an input coupled to one of the logic circuit outputs and multiple outputs coupled to multiple of the logic circuit inputs.

Hysteretic power converter controller

In a typical DC-DC converter, an error amplifier is used to sense and amplify the difference between the feedback voltage and the reference voltage. In the event of current overloading (limit condition), example embodiments of the disclosed systems and methods of over-load protection with voltage fold-back fold back the reference voltage proportional to the current limit. The regulator may continue to regulate in this fold-back voltage reference condition without shutting down the converter, saturating the inductor, or causing a catastrophic failure at the power FETs. The disclosed systems and methods of over-load protection with voltage fold-back resolve consecutive switching cycle current build up in high input voltage DC/DC convertor applications due to the latency of current limit circuitry.

Systems and methods of over-load protection with voltage fold-back

A circuit includes a device monitoring component, a voltage error component, a current error component, a power error component, an error selecting component, a filter instruction component and a filter. The device monitoring component monitors load voltage and load current, and outputs a device state signal. The voltage error component outputs a voltage error signal. The current error component outputs a current error signal. The power error component outputs a power error signal. The error selecting component outputs a selected error signal. The filter instruction component outputs a filter instruction based on the device state signal. The filter outputs a modification signal to modify operation of a device so as to modify one of the load voltage, the load current and the load power.

System and method for optimizing constant power, constant current and constant voltage operation

A digital control circuit is provided for use with a switch-mode power converter that receives an input signal at a first input node and a control signal at a second input node, and that provides an output signal at a first output node and a current signal at a second output node. The digital control circuit generates a programmable current reference signal based on a difference between the output signal and a voltage reference signal, calculates a time instant when the current signal substantially equals the programmable reference current signal, and generates the control signal based on the calculated time instant.

Digital peak current mode control for switch-mode power converters

A switched capacitor measurement circuit is provided for measuring the capacitance of an input capacitor with a parallel parasitic resistor. The circuit comprises a switching arrangement, a reference capacitor, a steered current sink and an operational amplifier with an output, a non-inverting input connected to a reference voltage source and an inverting input connected to a first terminal of the input capacitor. The current sink is steered to compensate for a charge current due to the parasitic resistor. Still further, the circuit comprises a digital adder and an analog-to-digital converter with an analog input connected to the output of the operational amplifier and a digital output connected to a first input of the digital adder. A second input of the digital adder receives a negative digital error signal and the output of the digital adder provides a digital capacitance measurement signal corrected for an error current which is integrated across the reference capacitor in the gain mode due to the slewing of the operational amplifier.

Switched capacitor measurement circuit for measuring the capacitance of an input capacitor

A switching regulator having a current limit with adaptive cycle skipping. A buck type switching regulator circuit is provided, including an energy storage component, such as an inductor or capacitor, and a switch for controllably providing an input current to the energy storage component. A control unit controls the on time and the off time of the switch by providing cyclically recurring control pulses to the switch that cause the switch to be on during the pulses and off otherwise. A current monitor circuit monitors a current corresponding to the input current applied to the energy storage component during the periodic control pulses. An overcurrent signal generator generates an overcurrent signal pulse upon detection of the monitored current at a level above a predetermined level corresponding to an overcurrent condition. A state machine responds to the overcurrent signal pulse and suppresses a number of the cyclically recurring control pulses, thereby controlling the period between the recurring control pulses that are not suppressed, in accordance with a predetermined algorithm that increases the number each time an overcurrent signal pulse is detected in successive periods.

Growing community of inventors

Denton, TX, United States of America

John Christian Vogt