Texas Instruments Corporation

John Charles Linn

LaVaughn F Watts, Jr

Anand Ganesh Dabak

Timothy M Schmidl

Alan Gatherer

Rex Alan Naden

Kevin D Davis

Christopher T Chang

Magid Yousri Dimyan

Jason M Brewer

Robert E Tonsing

Wayne C Hubbell

LaVaughn Watts

Keith L Perrin

Charles C Hoac

Quasi-parallel read/write interleaver architecture for data blocks by sequential spreading of variable size data subblocks into memory banks with bank address contention initiating the next data subblock. Iterative Turbo decoders with MAP decoders use such quasi-parallel interleavers and deinterleavers.

Interleaved coder and method

The described embodiments of the present invention provide a computer docking station (12, 32, 58, 68, 76, 84, 90, 92, 94, 96) that can have its functionality reconfigured by a docked portable personal computer (10, 38, 62, 66, 74, 82). In at least one embodiment of the invention, the computer docking station is configured as a stand alone computer prior to docking with a portable computer, may have its functionality reconfigured when docked to the portable computer, and reconfigures itself to be a stand alone computer when undocked from the portable computer. In one embodiment of the invention, docking station resources are placed under the control of a docked portable computer. In another embodiment of the invention, docked portable computer resources are placed under the control of the docking station. The invention contemplates docking via direct connection, radio requency 'RF' communications, infrared 'IR' communications, 1394 high performance serial bus communications, or card bus communications, and/or combinations of one or more of these communications techniques.

System for resources under control of docking station when stand alone

A computer uses an environmental manager (20) to detect and respond to changing environmental conditions, in order to enhance and simplify a users interaction with the computer. Environment changes are detected by a plurality of informants (22), each of which has a specified function. Informants communicate through a CIM (26). The CIM (26) establishes communication channels with each informant regarding which information will be provided by the informant and which information that informant needs from other informants. Informants (22) may receive environmental information from a number of sources, including physical location detectors, hardware configurations, software configurations, and network connections. As environmental conditions change, the informants and applications may respond to the changes. A particular capability to respond is the autolaunch capability which detects user behavior and uses this knowledge to automatically load a program responsive to changing environmental conditions.

Computer system with environmental manager for detecting and responding

System for resources under control of docking station when standalone

A method of configuring a mobile computer (H3) among different computer network configurations (N1, N2). In this method, the mobile computer is connected (18) to a first network medium in various steps. In one step, a network interface circuit (NIC) of the mobile computer is coupled to communicate with the first network medium. In another step, the mobile computer is configured to have an IP address allocated for the first network medium. Next, there is the step (20) of performing a program operation on the mobile computer to determine whether a dynamic configuration protocol is available on the first network medium. Another step performs a program operation to store an indicator in a storage resource of the mobile computer representing whether a dynamic configuration protocol is available on the first network medium. Next, the mobile computer is disconnected (22) from the first network medium, including uncoupling the network interface circuit of the mobile computer from communicating with the first network medium. Next, the mobile computer is connected (24) to a second network medium, including coupling the network interface circuit of the mobile computer to communicate with the second network medium, and performing a program operation on the mobile computer to request a user interface input. In response to the user interface input, the method performs a program operation to store (29) the IP address allocated for the first network medium in a persistent storage resource included within the mobile computer if the indicator indicates that a dynamic configuration protocol is not available on the first network medium. Also in response to the user interface input, the method performs a program operation on the mobile computer to configure (32) the mobile computer to have an IP address allocated for the second network medium by transmitting along the second network medium the IP address allocated for the second network medium from a server computer to the mobile computer.

System with program for automating protocol assignments when newly

A system for use in conjunction with the ALUs of computers, mini-computers, micro-computers and microprocessors wherein, upon a predetermined single command, the ALUs will be arranged to operate in a parity check mode or as a mask without otherwise disturbing the normal circuit operation of the ALUs utilized.

ALU operation: modulo two sum

A magnetic bubble memory structure having an enhanced storage density is made possible by reducing the circuit period, that is the distance between bubbles, in the storage section of the device. This reduction of the circuit period is made possible by using a gap tolerant propagation element, e.g. asymmetrical chevrons. The bubble storage sections are structured such that the areas closest to the transfer gates have a larger circuit period than the remainder of the storage section. The bubble chip architecture utilizing this means of enhancing the storage density may be of the major-minor loop configuration or the block-replicate configuration. Bubble storage sections in the form of loop structures may have a folded loop or an h loop configuration as well as a closed loop configuration. The reduction in circuit period accomplishes enhancement of the storage density without reducing the bubble diameter and other minimum circuit features to achieve this goal.

Bubble memory structure with enhanced data density

A magnetic domain memory including bubble operated access elements for non-destructively reading the memory, for erasing bubbles from the memory and for writing new data into the memory. The access elements comprise retrograde transient bubble switches, exclusive merge elements, disjoint crossover elements and bubble generators, all of which are all-bubble logic elements.

Magnetic domain memory employing all-bubble logic elements

A magnetic bubble memory organization comprising a plurality of magnetic bubble memory chips arranged in rows and columns to form a matrix. Each chip has a plurality of memory locations for storing magnetic bubbles, selectively operable components for transferring magnetic bubbles out of and into memory locations for the retrieval and storage of information, a selectively operable replicator and annihilator of magnetic bubble information transferred out of memory locations on the chip, a generator selectively operable for producing magnetic bubbles for storage in memory locations on the chip, and a detector for sensing the presence of magnetic bubbles transferred out of memory locations and for providing an electrical output signal in response to the detection thereof. First transfer electrical control signals are respectively commonly applied to the first transfer components on all chips in each of the respective columns of the matrix for their simultaneous actuation. Similarly second transfer electrical control signals are respectively commonly applied to the second transfer components on all chips in each of the respective columns of the matrix for their simultaneous actuation. Replicate and annihilate electrical control signals are respectively commonly applied to the replicator and annihilator on all chips in each of the respective rows of the matrix for their simultaneous actuation. Generate control signals are respectively commonly applied to the generators on all chips in each of the respective rows of the matrix for their simultaneous actuation. The movement of magnetic bubbles in all chips is synchronized. A single circuit commonly connecting the detector of each chip in the matrix conveys retrieved information out of the matrix. Thus, the memory locations of any magnetic bubble memory chip in the matrix may be selectively accessed for the storage and retrieval of information with a minimum number of different control signal sources and conductors for all the chips in the matrix and only a single output circuit.

Matrixed magnetic bubble memories

A magnetic bubble processor comprising components for causing the movement of magnetic bubbles and a single chip having a layer of magnetic material in which magnetic bubbles can be moved. The chip comprises an input circuit for conveying electrical data and instructions into the processor and a generator responsive to the input data and instructions for producing magnetic bubbles representing bits of information. Paths are provided on the chip for routing magnetic bubbles within the processor as well as a memory organization accessible for the storage and retrieval of magnetic bubble information. The chip also includes magnetic bubble logic for performing mathematical operations and for providing magnetic bubble output information representing the results thereof. Further, the chip includes a magnetic bubble decoder for deciphering information and providing magnetic bubble output signals determinative of operations the processor is to perform and a magnetic bubble circuit responsive to the decoder output signals for controlling the routing of magnetic bubble information along predetermined paths within the processor, the storage and retrieval of information in the memory, and for instructing the logic as to which mathematical or logical operations are to be performed. A magnetic bubble detector on the chip converts the output of the logic from magnetic bubble information into discrete processor electrical output signals. The converted information is conveyed out of the processor by an output circuit on the chip. Thus, complex programs involving mathematical and logical operations using magnetic bubble data and instructions may be performed on one chip with a minimum of external circuitry and control required.

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Richardson, TX, United States of America

John Charles Linn