Qualcomm Incorporated

John Bruce

Farshid Nowshadi

Touqeer Azam

David Weir

In certain aspects, a digital circuit comprises a delay line to generate a plurality of delayed versions of an input clock. The digital circuit also comprises selection circuitry to provide a selected one of the plurality of delayed versions of the input clock based on a clock selection signal and feedback circuitry to generate the clock selection signal based on the selected one of the plurality of delayed versions of the input clock and based on the input clock. The clock selection signal is further used for selecting and generating other clocks and/or for variation control.

Digital clock generation and variation control circuitry

In certain aspects, a clock generator includes a ring oscillator including an input and an output. The clock generator also includes a count circuit including an input and an output, wherein the input of the count circuit is coupled to the output of the ring oscillator. The clock generator also includes a comparator including a first input, a second input, and an output, wherein the first input of the comparator is configured to receive a first count value, and the second input of the comparator is coupled to the output of the count circuit. The clock generator further includes a shift register including a shift control input and an output, wherein the shift control input is coupled to the output of the comparator, and the output of the shift register is coupled to the input of the ring oscillator.

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Bishops Stortford, United Kingdom

John Bruce