Lam Research Corporation

Strasbaugh

Advanced Materials Sciences, Inc.

John Boyd

Yezdi N Dordi

Fred Conrad Redeker

Fritz C Redeker

William Thie

John Martin De Larios

Michael Ravkin

Carl Woods

Bob Maraschin

Hyungsuk Alexander Yoon

Tiruchirapalli Arunagiri

Michael S Lacy

Katrina Mikhaylich

Aleksander Owczarz

Yehiel Gotkis

Mike Ravkin

Rod Kistler

Mikhail Korolik

Arthur M Howald

David J Hemker

Andras Kuthi

John M deLarios

Miguel Angel Saldana

John P Parks

Robert A Maraschin

David Wei

Seokmin Yun

Joel M Cook

Alek Owczarz

Andrew D Bailey, Iii

Shijian Li

David G Halley

Thomas W Anderson

Randolph E Treur

Michael G R Smith

Simon McClatchie

Tom Anderson

Michael L Orbock

Robert G Boehm

Alex Yoon

Fred C Redecker

Alan M Schoepp

Mark Henry Wilcoxson

Xuyen Pham

James Paul Garcia

Praveen Nalla

Benjamin W Mooring

Damon Vincent Williams

Jason A Ryder

Herbert Elliot Litvak

Sridharan Srivatsan

Afshin Nickhou

Sabir A Majumder

Zhonghui Alex Wang

Gregory C Lee

Allan Paterson

Katgenahalli Y Ramanujam

Kostadin Petkov

Mark Wesselmann

Johan Vertommen

Robert Metter

Michael S Wisnieski

A cluster architecture and methods for processing a substrate are disclosed. The cluster architecture includes a lab-ambient controlled transfer module that is coupled to one or more wet substrate processing modules. The lab-ambient controlled transfer module and the one or more wet substrate processing modules are configured to manage a first ambient environment. A vacuum transfer module that is coupled to the lab-ambient controlled transfer module and one or more plasma processing modules is also provided. The vacuum transfer module and the one or more plasma processing modules are configured to manage a second ambient environment. And, a controlled ambient transfer module that is coupled to the vacuum transfer module and one or more ambient processing modules is also included. The controlled ambient transfer module and the one or more ambient processing modules are configured to manage a third ambient environment. The cluster architecture therefore enables controlled processing of the substrate in either the first, second or third ambient environments, as well as during associated transitions.

Controlled ambient system for interface engineering

An apparatus generating a plasma for removing fluorinated polymer from a substrate is provided. The apparatus includes a powered electrode assembly, which includes a powered electrode, a first dielectric layer, and a first wire mesh disposed between the powered electrode and the first dielectric layer. The apparatus also includes a grounded electrode assembly disposed opposite the powered electrode assembly so as to form a cavity wherein the plasma is generated. The first wire mesh is shielded from the plasma by the first dielectric layer when the plasma is present in the cavity, which has an outlet at one end for providing the plasma to remove the fluorinated polymer.

Apparatus for the removal of a fluorinated polymer from a substrate

The embodiments fill the need of improving electromigration and reducing stress-induced voids of copper interconnect by enabling deposition of a thin and conformal barrier layer, and a copper layer in the copper interconnect. The adhesion between the barrier layer and the copper layer can be improved by making the barrier layer metal-rich prior copper deposition and by limiting the amount of oxygen the barrier layer is exposed prior to copper deposition. Alternatively, a functionalization layer can be deposited over the barrier layer to enable the copper layer being deposit in the copper interconnect with good adhesion between the barrier layer and the copper layer. An exemplary method of preparing a substrate surface of a substrate to deposit a functionalization layer over a metallic barrier layer of a copper interconnect to assist deposition of a copper layer in the copper interconnect in an integrated system in order to improve electromigration performance of the copper interconnect is provided. The method includes depositing the metallic barrier layer to line the copper interconnect structure in the integrated system, wherein after depositing the metallic barrier layer, the substrate is transferred and processed in controlled environment to prevent the formation of metallic barrier oxide. The method also includes depositing the functionalization layer over the metallic layer in the integrated system. The method further includes depositing the copper layer in the copper interconnect structure in the integrated system after the functionalization layer is deposited over the metallic barrier layer.

Method for barrier interface preparation of copper interconnect

The embodiments fill the need to enhance electro-migration performance, provide lower metal resistivity, and improve metal-to-metal interfacial adhesion for copper interconnects by providing improved processes and systems that produce an improved metal-to-metal interface, more specifically copper-to-cobalt-alloy interface. An exemplary method of preparing a substrate surface of a substrate to selectively deposit a thin layer of a cobalt-alloy material on a copper surface of a copper interconnect of the substrate in an integrated system to improve electromigration performance of the copper interconnect is provided. The method includes removing contaminants and metal oxides from the substrate surface in the integrated system, and reconditioning the substrate surface using a reducing environment after removing contaminants and metal oxides in the integrated system. The method also includes selectively depositing the thin layer of cobalt-alloy material on the copper surface of the copper interconnect in the integrated system after reconditioning the substrate surface. An exemplary system to practice the exemplary method described above is also provided.

Processes and systems for engineering a copper surface for selective metal deposition

The embodiments fill the need to enhance electro-migration performance, provide lower metal resistivity, and improve silicon-to-metal interfacial adhesion for copper interconnects by providing improved processes and systems that produce a silicon-to-metal interface. An exemplary method of preparing a substrate surface of a substrate to selectively deposit a layer of a metal on a silicon or polysilicon surface of the substrate to form a metal silicide in an integrated system is provided. The method includes removing organic contaminants from the substrate surface in the integrated system, and reducing the silicon or polysilicon surface in the integrated system after removing organic contaminants to convert silicon oxide on the silicon or polysilicon surface to silicon, wherein after reducing the silicon or polysilicon surface, the substrate is transferred and processed in controlled environment to prevent the formation of silicon oxide, the silicon or polysilicon surface is reduced to increase the selectivity of the metal on the silicon surface. The method further includes selectively depositing the layer of the metal on the silicon or polysilicon surface of substrate in the integrated system after reducing the silicon or polysilicon surface. An exemplary system to practice the exemplary method described above is also provided.

Processes and systems for engineering a silicon-type surface for selective metal deposition to form a metal silicide

A pressure is maintained within a volume within which a semiconductor wafer resides at a pressure that is sufficient to maintain a liquid state of a precursor fluid to a non-Newtonian fluid. The precursor fluid is disposed proximate to a material to be removed from the semiconductor wafer while maintaining the precursor fluid in the liquid state. The pressure is reduced in the volume within which the semiconductor wafer resides such that the precursor fluid disposed on the wafer within the volume is transformed into the non-Newtonian fluid. An expansion of the precursor fluid and movement of the precursor fluid relative to the wafer during transformation into the non-Newtonian fluid causes the resulting non-Newtonian fluid to remove the material from the semiconductor wafer.

Method for removing material from semiconductor wafer and apparatus for performing the same

An electroless plating system is provided. The system includes a first vacuum chuck supporting a first wafer and a second vacuum chuck supporting a second wafer such that a top surface of the second wafer is opposing a top surface of the first wafer. The system also includes a fluid delivery system configured to deliver a plating solution to the top surface of the first wafer, wherein in response to delivery of the plating solution, the top surface of the second wafer is brought proximate to the top surface of the first wafer so that the plating solution contacts both top surfaces. A method for applying an electroless plating solution to a substrate is also provided.

Simultaneous electroless plating of two substrates

Broadly speaking, a method and an apparatus are provided for depositing a material on a semiconductor wafer ('wafer'). More specifically, the method and apparatus provide for selective heating of a surface of the wafer exposed to an electroless plating solution. The selective heating is provided by applying radiant energy to the wafer surface. The selective heating of the wafer surface causes a temperature increase at an interface between the wafer surface and the electroless plating solution. The temperature increase at the interface in turn causes a plating reaction to occur at the wafer surface. Thus, material is deposited on the wafer surface through an electroless plating reaction that is initiated and controlled by varying the temperature of the wafer surface using an appropriately defined radiant energy source.

Method and apparatus for material deposition

An electroplating head is disposed above and proximate to an upper surface of a wafer. Cations are transferred from an anode to an electroplating solution within the electroplating head. The electroplating solution flows downward through a porous electrically resistive material at an exit of the electroplating head to be disposed on the upper surface of the wafer. An electric current is established between the anode and the upper surface of the wafer through the electroplating solution. The electric current is uniformly distributed by the porous electrically resistive material present between the anode and the upper surface of the wafer. The electric current causes the cations to be attracted to the upper surface of the wafer.

Electroplating head and method for operating the same

A method for producing a normalized surface on a substrate for a chemical mechanical planarization process is provided. The method initiates with grinding a surface of the substrate with a first surface associated with a first planarization length. The method includes planarizing the surface of the substrate with a second surface associated with a second planarization length. Here, the second planarization length being less than the first planarization length. A system for processing a semiconductor substrate is also provided.

Pre-planarization system and method

A substrate processing system includes a first, movable surface tension gradient device, a dicing device and a system controller. The first, movable surface tension gradient device is capable of supporting a first process within a first meniscus. The first meniscus being supported between the first surface tension gradient device and a first surface of the substrate. The first movable surface tension gradient device capable of being moved relative to the first surface of the substrate. The dicing device is oriented to a desired dicing location. The desired dicing location being encompassed by the meniscus. The system controller is coupled to the dicing device and the surface tension gradient device. The system controller includes a process recipe. A method for dicing a substrate is also described. The method of dicing a substrate including placing a substrate in a substrate dicing system, forming a meniscus between a proximity head and a first surface of the substrate, dicing the substrate at a desired dicing location and simultaneously capturing any particles and contaminants generated by dicing the substrate within the meniscus, the meniscus including the desired dicing location and moving the meniscus in a desired dicing direction.

System method and apparatus for dry-in, dry-out, low defect laser dicing using proximity technology

The embodiments fill the need to enhance electro-migration performance, provide lower metal resistivity, and improve metal-to-metal interfacial adhesion for copper interconnects by providing improved processes and systems that produce an improved metal-to-metal interface, more specifically barrier-to-copper interface. An exemplary method of preparing a substrate surface of a substrate to deposit a metallic barrier layer to line a copper interconnect structure of the substrate and to deposit a thin copper seed layer on a surface of the metallic barrier layer in an integrated system to improve electromigration performance of the copper interconnect is provided. The method includes cleaning an exposed surface of a underlying metal to remove surface metal oxide in the integrated system, wherein the underlying metal is part of a underlying interconnect electrically connected to the copper interconnect. The method also includes depositing the metallic barrier layer to line the copper interconnect structure in the integrated system, wherein after depositing the metallic barrier layer, the substrate is transferred and processed in controlled environment to prevent the formation of metallic barrier oxide. The method further includes depositing the thin copper seed layer in the integrated system, and depositing a gap-fill copper layer over the thin copper seed layer in the integrated system. An exemplary system to practice the exemplary method described above is also provided.

Processes and systems for engineering a barrier surface for copper deposition

This invention pertains to methods and systems for fabricating semiconductor devices. One aspect of the present invention is a method of depositing a gapfill copper layer onto a barrier layer for semiconductor device metallization. In one embodiment, the method includes forming the barrier layer on a surface of a substrate and subjecting the barrier layer to a process condition so as to form a removable passivated surface on the barrier layer. The method further includes removing the passivated surface from the barrier layer and depositing the gapfill copper layer onto the barrier layer. Another aspect of the present invention is an integrated system for depositing a copper layer onto a barrier layer for semiconductor device metallization. In one embodiment, the integrated system comprises at least one process module configured for barrier layer deposition and passivated surface formation and at least one other process module configured for passivated surface removal and deposition of copper onto the barrier layer. The system further includes at least one transfer module coupled so that the substrate can be transferred between the modules substantially without exposure to an oxide-forming environment.

Methods and systems for barrier layer surface passivation

The present invention relates to methods and systems for the metallization of semiconductor devices. One aspect of the present invention is a method of depositing a copper layer onto a barrier layer so as to produce a substantially oxygen free interface therebetween. In one embodiment, the method includes providing a substantially oxide free surface of the barrier layer. The method also includes depositing an amount of atomic layer deposition (ALD) copper on the oxide free surface of the barrier layer effective to prevent oxidation of the barrier layer. The method further includes depositing a gapfill copper layer over the ALD copper. Another aspect of the present invention is a system for depositing a copper layer onto barrier layer so as to produce a substantially oxygen-free interface therebetween. In one embodiment, the integrated system includes at least one barrier deposition module. The system also includes an ALD copper deposition module configured to deposit copper by atomic layer deposition. The system further includes a copper gapfill module and at least one transfer module coupled to the at least one barrier deposition module and to the ALD copper deposition module. The transfer module is configured so that the substrate can be transferred between the modules substantially without exposure to an oxide-forming environment.

Methods and systems for low interfacial oxide contact between barrier and copper metallization

Growing community of inventors

Atascadero, CA, United States of America

John Boyd