Applied Materials, Inc.

John Boland

Zhiyuan Ye

Schubert S Chu

Errol Antonio C Sanchez

Yihwan Kim

Yi-Chiau Huang

Papo Chen

Stephen Moffatt

Lori D Washington

Errol C Sanchez

Adam Brand

Bingxi Sun Wood

Xianzhi Tao

Chen-Ying Wu

A method of fabricating a semiconductor device includes forming an interconnect structure over a front side of a sensor substrate, thinning the sensor substrate from a back side of the sensor substrate, etching trenches into the sensor substrate, pre-cleaning an exposed surface of the sensor substrate, epitaxially growing a charge layer directly on the pre-cleaned exposed surface of the sensor substrate, and forming isolation structures within the etched trenches.

Structure and material engineering methods for optoelectronic devices signal to noise ratio enhancement

Generally, examples described herein relate to methods and processing chambers and systems for forming a stacked pixel structure using epitaxial growth processes and device structures formed thereby. In an example, a first sensor layer is epitaxially grown on a crystalline surface on a substrate. A first isolation structure is epitaxially grown on the first sensor layer. A second sensor layer is epitaxially grown on the first isolation structure. A second isolation structure is epitaxially grown on the second sensor layer. A third sensor layer is epitaxially grown on the second isolation structure.

Stacked pixel structure formed using epitaxy

Methods of forming a fin structure for a field effect transistor are described. The methods may include the operations of patterning a mandrel on a surface of a substrate, and depositing an epitaxial layer of high-mobility channel material over exposed surfaces of the patterned mandrel. The epitaxial layer leaves a gap between adjacent columns of the patterned mandrel, and a dielectric material may be deposited in the gap between the adjacent columns of the patterned mandrel. The methods may also include planarizing the epitaxial layer to form a planarized epitaxial layer and exposing the columns of the patterned mandrel, and etching at least a portion of the exposed columns of the patterned mandrel and the dielectric material to expose at least a portion of the planarized epitaxial layer that forms the fin structure.

Fin formation by epitaxial deposition

Methods for forming embedded epitaxial layers containing silicon and carbon are disclosed. Specific embodiments pertain to the formation embedded epitaxial layers containing silicon and carbon on silicon wafers. In specific embodiments an epitaxial layer of silicon and carbon is non-selectively formed on a substrate or silicon wafer, portions of this layer are removed to expose the underlying substrate or silicon wafer, and an epitaxial layer containing silicon is formed on the exposed substrate or silicon wafers. In specific embodiments, gates are formed on the resulting silicon-containing epitaxial layers.

Method of forming an embedded silicon carbon epitaxial layer

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Scotts Valley, CA, United States of America

John Boland