International Business Machines Corporation

John Batey

Peter M Fryer

Jun Hyung Souk

Steven Lorenz Wright

Sandip Tiwari

Rajiv V Joshi

John J Boland

Elaine Tierney

Gregory N Parsons

A thin film transistor and a liquid crystal display panel are provided. These devices include a layer of ammonia-free silicon nitride formed between the gate and the gate insulator of the device.

Transistor having ammonia free nitride between its gate electrode and gate insulation layers

A method for passivating copper, aluminum, or other refractory metal films using ammonia-free silicon nitride and structures produced by the method. A thin film transistor for use in a liquid crystal display and a method of constructing the same, wherein the transistor has a gate, a source and a drain, and a gate insulator between the gate and an active silicon layer. The improvement is a layer of the ammonia-free silicon nitride deposited between the copper,aluminum, or other refractory metal gate and the gate insulator. Further,. the gate is copper, aluminum, or another refractory metal and is deposited directly on the substrate. The layer of ammonia-free silicon nitride is also deposited on portions of the substrate adjacent the gate and the gate line extending therefrom. The layer is made in a plasma-enhanced chemical vapor deposition process wherein the gas mixture comprises one part silane to 135 parts nitrogen to 100 parts helium and 100 parts hydrogen. A structure, and a process for forming the structure, for providing stable and low-resistance electrical contact between copper,aluminum, or another refractory metal gate lines and a metallization layer of aluminum and/or molybdenum, includes using a conductive material, such as an indium tin oxide bridge. Prior to depositing the metallization layer, the copper,aluminum, or other refractory metal which extends over a portion of the conductive material, and a portion of the conductive material not covered by the copper,aluminum, or other refractory metal are passivated with a layer of the ammonia-free silicon nitride. The metallization layer is then connected to the conductive material through a via hole extending to that portion of the conductive material which is not covered by the copper, aluminum, or another refractory metal.

Passivation of copper with ammonia-free silicon nitride and application to TFT/LCD

A method for passivating copper, aluminum, or other refractory metal films using ammonia-free silicon nitride and structures produced by the method. A thin film transistor for use in a liquid crystal display and a method of constructing the same, wherein the transistor has a gate, a source and a drain, and a gate insulator between the gate and an active silicon layer. The improvement is a layer of the ammonia-free silicon nitride deposited between the copper, aluminum, or other refractory metal gate and the gate insulator. Further, the gate is copper, aluminum, or another refractory metal and is deposited directly on the substrate. The layer of ammonia-free silicon nitride is also deposited on portions of the substrate adjacent the gate and the gate line extending therefrom. The layer is made in a plasma-enhanced chemical vapor deposition process wherein the gas mixture comprises one part silane to 135 parts nitrogen to 100 parts helium and 100 parts hydrogen. A structure, and a process for forming the structure, for providing stable and low-resistance electrical contact between copper, aluminum, or another refractory metal gate lines and a metallization layer of aluminum and/or molybdenum, includes using a conductive material, such as an indium tin oxide bridge. Prior to depositing the metallization layer, the copper, aluminum, or other refractory metal which extends over a portion of the conductive material, and a portion of the conductive material not covered by the copper, aluminum, or other refractory metal are passivated with a layer of the ammonia-free silicon nitride. The metallization layer is then connected to the conductive material through a via hole extending to that portion of the conductive material which is not covered by the copper, aluminum, or another refractory metal.

Passivation of copper with ammonia-free silicon nitride and application

A layer for passivating copper, aluminum, or other refractory metal films using ammonia-free silicon nitride and structures produced by the method. A thin film transistor for use in a liquid crystal display, wherein the transistor has a gate, a source and a drain, and a gate insulator between the gate and an active silicon layer. The improvement is a layer of the ammonia-free silicon nitride deposited between the copper, aluminum, or other refractory metal gate and the gate insulator. Further, the gate is copper, aluminum, or another refractory metal and is deposited directly on the substrate. The layer of ammonia-free silicon nitride is also deposited on portions of the substrate adjacent the gate and the gate line extending therefrom. The structure provides stable and low-resistance electrical contact between copper, aluminum, or another refractory metal gate lines and a metallization layer of aluminum and/or molybdenum, includes using a conductive material, such as an indium tin oxide bridge. A metallization layer of the device is connected to the conductive material through a via hole extending to that portion of the conductive material which is not covered by the copper, aluminum, or another refractory metal.

A substrate having silicon receptive surface areas is maintained in a plasma enhanced chemical vapor deposition (PECVD) chamber at a temperature, and under sufficient gas flow, pressure and applied energy conditions to form a gas plasma. The gas plasma is typically made up of hydrogen, but may be made up of mixtures of hydrogen with other gasses. A discontinuous flow of silane gas of predetermined duration and predetermined time spacing is introduced to produce at least one timed pulse of silane gas containing plasma, whereby a thin layer of silicon is deposited on the receptive areas of the substrate. The thin layer of silicon is exposed to the hydrogen gas plasma between the brief deposition time cycles and may result in the modification of the silicon layer by the hydrogen plasma. The surface modification may include at least one of etching, surface hydrogenation, surface bond reconstruction, bond strain relaxation, and crystallization, and serves the purpose of improving the silicon film for use in, for example, electronic devices. Repeated time pulses of silane gas and subsequent hydrogen plasma exposure cycles can result in selective deposition of silicon on predetermined receptive areas of a patterned substrate. Selective deposition of silicon can serve the purpose of simplifying electronic device manufacturing, such as, for example, the fabrication of amorphous silicon thin film transistors with low contact resistance in a single PECVD pump-down procedure.

Pulsed gas plasma-enhanced chemical vapor deposition of silicon

Unpinned epitaxial metal-oxide-compound semiconductor structures are disclosed and a method of fabricating such structures is described. Epitaxial layers of compound semiconductor are grown by MBE which result in the formation of a smooth surface having a stabilized reconstruction. An elemental semiconductor layer is deposited epitaxially in situ with the compound semiconductor layer which unpins the surface Fermi level. A layer of insulator material is then deposited on the elemental semiconductor layer by PECVD. In one embodiment, the compound semiconductor is GaAs and the elemental semiconductor is Si. The insulator material is a layer of high quality SiO.sub.2. A metal gate is deposited on the SiO.sub.2 layer to form an MOS device. The epitaxial GaAs layer has a density of states which permits the interface Fermi level to be moved through the entire forbidden energy gap. In another embodiment, the SiO.sub.2 deposition completely consumes the interface Si layer so that the resulting MOS device comprises SiO.sub.2 directly overlying the GaAs layer.

Unpinned oxide-compound semiconductor structures and method of forming

A method for depositing high quality silicon dioxide in a plasma enhanced chemical vapor deposition tool is described. The reactant gases are introduced into the tool together with a large amount of an inert carrier gas. A plasma discharge is established in tool by using a high RF power density thereby depositing high quality silicon dioxide at very high deposition rates. In a single wafer tool, the RF power density is in the range of 1-4 W/cm.sup.2 and the deposition rate is from 600-1500 angstroms per minute for depositing high quality SiO.sub.2 films.

Method for depositing high quality silicon dioxide by PECVD

Thin film field effect transistors are disclosed having direct or near direct contact of the source and drain electrodes to the channel region. Inverted gate and non-inverted gate types are fabricated by forming metallic source and drain electrodes within a layer of semiconductor material in contact with the channel region. The electrodes are formed by converting monocrystalline, polycrystalline or amorphous silicon regions to a refractory metal such as tungsten by using a non-self-limiting metal hexafluoride reduction process. The tungsten conversion process is isotropic and provides self-alignment of the source and drain electrodes with the gate in the non-inverted gate TFT. The process is low temperature, allowing the use of amorphous silicon as the semiconductor material. The transistors are especially useful for formation on large glass substrates for fabricating large flat panel displays.

Thin film transistor

Unpinned epitaxial metal-oxide-compound semiconductor structures are disclosed and a method of fabricating such structures is described. Epitaxial layers of compound semiconductor are grown by MBE which result in the formation of a smooth surface having a stabilized reconstruction. An elemental semiconductor layer is deposited epitaxially in-situ with the compound semiconductor layer which unpins the surface Fermi level. A layer of insulator material is then deposited on the elemental semiconductor layer by PECVD. In one embodiment, the compound semiconductor is GaAs and the elemental semiconductor is Si. The insulator material is a layer of high quality SiO.sub.2. A metal gate is deposited on the SiO.sub.2 layer to form an MOS device. The epitaxial GaAs layer has a density of states which permits the interface Fermi level to be moved through the entire forbidden energy gap. In another embodiment, the SiO.sub.2 deposition completely consumes the interface Si layer so that the resulting MOS device comprises SiO.sub.2 directly overlying the GaAs layer.

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Redwood City, CA, United States of America

John Batey