Seachange International, Inc.

Seachange Technology, Inc.

Digital Equipment Corporation

Seachange Systems, Inc.

John A Ywoskus

Bruce Eric Mann

Philip John Trasatti

Edward J McGrath

Michael D Carlozzi

Roger H Levesque

Philip I Trasatti

Kenneth J Izbicki

A method and apparatus redundantly store data, in particular video data objects, in a distributed computer system having at least three processor systems, each processor system being connected in point to point two way channel interconnection with each other processor system. The data is stored in a redundant fashion both at the computer system level as well as the processor system level. Accordingly, the failure of a single processor does not adversely affect the integrity of the data. The computer system can also overlay a switching system connected in a ring fashion for providing a fault tolerance to the failure of a single connected processor system at the switch level. Accordingly, there results a fault tolerant data distribution system.

Loosely coupled mass storage computer cluster having a set of data storage controllers interoperable for reading and writing data objects

Loosely coupled mass storage computer cluster

A redundant array includes a plurality of disks, a bus coupling the disks, a receiving device, and a device to reconstruct a block stored in one of the disks. The device reconstructs the block with associated data and parity blocks from other disks. The device transmits the reconstructed block to the receiving device in response to the one of the disks being slowly responding. A method includes requesting a first disk to transmit a first block, reconstructing, when necessary, the first block from associated data stored in other disks of a RAID configuration, and transmitting the reconstructed block directly to a receiving device. The transmitting is in response to the first disk not transmitting the block in a predetermined time.

Slow response in redundant arrays of inexpensive disks

A computer communications system has a controller for controlling a master with a circuit timer, the circuit timer is capable of aggregating data produced during a circuit timer interval into a single master message, and the data is produced by a plurality of users, where each user is capable of establishing a plurality of sessions. There is a communication pathway, responsive to expiration of the circuit timer interval, for sending the aggregated data to a slave. Also there is a acknowledgement circuit for the slave to send an acknowledge message to the master upon expiration of a delay ACK time interval, the delay ACK time interval is greater than the circuit timer interval, and the circuit timer is capable of initiating sending of a plurality of master messages during one delay ACK time interval. Further, there is a delay acknowledgement circuit, responsive to receipt of the plurality of master messages, for the slave to acknowledge the plurality of master messages in one acknowledge message, and each user and each session being acknowledged by the one acknowledge message.

Delayed acknowledgement in an asymmetric timer based LAN communications

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Merrimack, NH, United States of America

John A Ywoskus