Westinghouse Electric Corporation

Northrop Grumman Systems Corporation

John A Ostop

Joseph E Johnson

Robin E Hamilton

Paul G Kennedy

Gregory Alan Arlow

Thomas J Fagan, Jr

Martin L Baker

John C Golombeck

David L Moore

John Xavier Przybysz

Li-shu Chen

Kenneth J Petrosky

Paul A Potyraj

Paul M Kisinko

Joseph F Henry

Robert W Marks

Cooling of densely packaged semiconductor devices is achieved by microchannels which extract heat by forced convection and the use of fluid coolant located as close as possible to the heat source. The microchannels maximize heat sink surface area and provides improved heat transfer coefficients, thereby allowing a higher power density of semiconductor devices without increasing junction temperature or decreasing reliability. In its preferred embodiment, a plurality of microchannels are formed directly in the substrate portion of a silicon or silicon carbide chip or die mounted on a ground plane element of a circuit board and where a liquid coolant is fed to and from the microchannels through the ground plane. The microchannels comprise a plurality of closed-ended slots or grooves of generally rectangular cross section. Fabrication methods include deposition and etching, lift-off processing, micromachining and laser cutting techniques.

Method of extracting heat from a semiconductor body and forming

A die attach procedure for SiC uses the scrubbing technique to bond a SiC die to a package. A first layer is formed on the SiC die. This first layer, preferably of nickel, bonds to the SiC die. A second layer, preferably amorphous silicon, is then formed on the first layer. The second layer bonds to the first layer, and forms a eutectic with the material, usually gold, plating the package when the SiC die is scrubbed onto the package.

Die attached process for SiC

Microchannel cooling of high power semiconductor devices

A method for fabricating microwave power transistor elements onto a semiconductor body. An oxidizable barrier material is applied onto the wafer that both acts as a barrier to prevent diffusion between the contact metal of the transistor and the silicon and also acts as a ballast resistor. A contact metal layer is then deposited onto the barrier material at selected locations and the excess barrier material is removed. Barrier material is left between the contact metal and the silicon and at the selected ballast resistor locations. The ballast resistors may then be trimmed, increasing the value of the resistors, by oxidizing a thin surface layer of the exposed barrier material at the ballast resistor locations.

Method of making and trimming ballast resistors and barrier metal in

The present invention is directed to a thyristor self-protected against overvoltage by the avalanche mechanism, the protection resulting from a laser scribed ring shaped groove cut in the top surface of the thyristor and extending into one base region of the thyristor whereby the forward blocking junction is contoured toward the reverse blocking junction under the ring shaped groove, and to the process for making the thyristor.

Method of making a self protected thyristor

A glass disc-shaped thyristor is disclosed. The thyristor comprises a body of semiconductive material having a first emitter region, a first base region, a second base region and a second emitter region therein. A cathode electrode and a gate electrode are affixed to one major surface, and an anode electrode is affixed to the second major surface of the body of semiconductor material. The cathode electrode is disc-shaped and is concentrically positioned with respect to the annular-shaped gate electrode. A ring-shaped glass member is affixed to a first major surface of the body of semiconductive material and to the edges of the cathode and base electrodes to form a seal protecting a PN junction at the interface of the first emitter and base regions. An anode electrode is affixed to the second major surface of the body of semiconductive material. A second annular shaped glass member is affixed to the edge of the body of semiconductive material to form a seal protecting PN junctions formed at the interface of the first and second base regions and at the interface of the second base region with the second emitter region. The first and second ring-shaped glass members are formed by fusing glass preforms in an atmosphere comprising a predetermined mixture of nitrogen and water vapor to cause the glass preforms to soften and fuse to the surfaces of the body of semiconductive material to form a protective seals.

Glass-sealed power thyristor

A method for doping a wafer of n-type seimiconductor material having two surfaces includes the steps of applying a boron solution to a first surface of the wafer and heating the wafer to drive the boron into the semiconductor wafer for forming a first p-type region. Both surfaces of the wafer are then exposed to a gallium vapor for forming a second p-type region on the second surface and deepening the extent of the first p-type region.

Technique for making asymmetric thyristors

A glass sealed semiconductor diode is disclosed. The diode includes a fusion which comprises a body of semiconductor material having a PN junction therein and metal electrodes affixed to opposed major surfaces of the semiconductor body. The fusion is encircled by an annular-shaped glass member with an inner surface of the annular-shaped glass member fused to an edge surface of the fusion to form a protective layer over the PN junction. An annular metallic member encircles the annular glass member with an inner surface thereof fused to an outer surface of the annular glass member.

Glass sealed diode

A plurality of discrete transistor devices are produced on a semiconductor wafer and isolated from one another by moat etching. A passivation layer is then deposited in the moats separating the discrete transistor devices. The semiconductor wafer is then scribed and broken along lines delineated by the moats. The disclosed method permits testing of each discrete transistor device prior to separation from the wafer.

Method of making a transistor device

A bipolar transistor is provided with both high voltage and high frequency capabilities. A semiconductor body of a resistivity between 10 and 100 ohm-cm forms the collector region of the transistor and has an epitaxial semiconductor layer grown on a major surface thereof of a resistivity between about 0.5 and 10 ohm-cm and of a thickness between about 20 and 100 microns and of a conductivity type opposite from the body. At least one emitter region and integral emitter electrode are alloyed into the epitaxial layer preferably in annular rings. A base region is formed in the epitaxial layer between the emitter and semiconductor body and around the emitter region, said base region having a minimum thickness between the emitter region and the semiconductor body in the interior of the body of less than 20 and preferably between 5 and 10 microns. Base electrodes are alloyed into the epitaxial layer preferably spaced from the emitter region and emitter electrode preferably in concentric annular rings and a center circular member.

Growing community of inventors

Greensburg, PA, United States of America

John A Ostop