Marconi Electronic Devices Limited

John A Kerr

Ian F Deviny

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A semiconductor arrangement includes a substrate having a plurality of transistors formed therein and a tungsten layer thereon in the form of elongate tracks serving to interconnect the transistors. Localized regions of highly doped semiconductor material underlie the tracks and form an ohmic contact therewith. The tungsten layer is overlaid with an electrically insulating oxide on which further electrical interconnections are present.

Interconnecting layer on a semiconductor substrate

A semiconductor device having a sapphire substrate on which is formed a localized island of polysilicon, the island having side walls which extend away from a surface of the substrate. A field effect transistor is formed in the island and a doped polysilicon fillet is interposed between the gate region and the substrate. In addition the electrical potential of the polysilicon fillet is controlled with respect to the source region. The control of the electrical potential enables the premature turn on characteristics of the device to be reduced by the polysilicon fillet forming a secondary gate electrode on the side walls, and because these secondary gates are at source potential the parasitic edge transistor present in the side wall is always turned off. A modified device has an independent side gate bias arrangement.

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Lakelands, United Kingdom

John A Kerr