Adeia Semiconductor Bonding Technologies Inc.

John A Grange

Thomas H DiStefano

Gary W Grube

Zlata Kovac

Jason Sweis

Igor Y Khandros

Gaetan L Mathieu

David Noel Light

Hung-Ming Wang

Gaetan Mathiew

David R Baker

Metal leads are formed on a copper conductive layer by applying a first resist and a main resist over the first resist, and forming aligned openings in these resist. A bottom layer of cover metal such as gold is plated onto the copper conductive layer in these openings, followed by a principal metal such as copper. The main resist is then removed so as to expose edges of the principal metal layer. A jacket of cover metal is plated onto the exposed edges and surfaces of the principal metal layer. During this stage, the first resist prevents deposition of the cover metal except on the leads. The jacket merges with the bottom layer of cover material, so as to form a continuous coating extending around the perimeters of the leads. The first resist is removed, and the conductive layer is etched away. The cover metal protects the principal metal during the etching stage.

Metal-jacketed lead manufacturing process using resist layers

A method of connecting a semiconductor chip assembly having at least first and second contacts to a connection component including at least first and second connection leads by means of a tool consisting of the steps of juxtaposing moving and connecting the leads to the corresponding contacts. The connection component is juxtaposed with the semiconductor chip assembly so that the first and second connection leads are aligned with the first and second contacts in such a manner that the first connection lead is offset from the first contact in the first direction and the second connection lead is offset from the second contact in the same first direction. The first connection lead is moved by means of the tool substantially downwardly and towards the first contact in a second direction which is opposite to the first direction, so that an open space is formed between the first connection lead and the second contact and lead to facilitate movement of the second connection lead by the tool substantially downwardly and towards the second contact in the second direction.

Microelectronic bonding with lead motion

In a semiconductor inner lead bonding process, a connection component having leads is disposed on the chip surface so that the leads lie above the contacts. A bond region of each lead is forced downwardly by a tool into engagement with a contact on the chip while a first or proximal end of the lead remains attached to a dielectric support structure. The lead is deformed into an S-shaped configuration by moving the bonding tool horizontally towards the proximal or first end of the lead, thereby forcing the bonding region towards the first end and bending or buckling the lead. Alternatively, the lead is bent downwardly by a tool and the tool may then be disengaged from the lead, shifted away from the proximal end of the lead and again advanced downwardly to secure the lead to the chip contact.

Shaped lead structure and method

A bonding tool for bonding inner leads to semiconductor chips is arranged to capture and align elongated lead sections extending in any one of plural directions, and preferably, in any one of two mutually orthogonal directions. Thus, the tool can be applied to align and bond all of the leads to a chip without turning the tool or the chip even where the leads extend in multiple directions.

Semiconductor inner lead bonding tool

Growing community of inventors

Cupertino, CA, United States of America

John A Grange