Raytheon Company

Fairchild Semiconductor Corporation

John A DeFalco

Michael Joseph McPartlin

Mikhail Shirokov

A switchable amplifier circuit having a current mirror. The mirror includes: a first current source for producing a reference current; an output transistor having an input electrode and an output electrode; and a current gain device connected between an output of the first current source and the input electrode of the output transistor. A bias current is produced through the output electrode of the output transistor, such bias current being a function of the reference current produced by the first current source. A second current source has an output coupled to an input of the current gain device. The second current source provides a current which is a fraction of the reference current. A switching transistor has an output electrode coupled to: (1) an input of the current gain device; and, (2) an output of the second current source. The switching transistor: (1) sinks the current from the second current source in response to an input signal fed to such switching transistor inhibiting current from the second current source to pass to the current gain device and thereby remove the bias current for the output transistor driving the output transistor to a non-conducting condition; or (2) enables the current from the second current source to pass to the current gain device in response to the input signal fed to such switching transistor driving the output transistor to a conducting condition.

Switchable amplifier circuit having reduced shutdown current

An integrated circuit biasing network for producing .a.predetermined level of bias current. The bias network includes a field-effect transistor having a gate, a source and a drain. The transistor produces a level of bias current corresponding to a predetermined input gate-source voltage applied to the field effect transistor. A control circuit is provided. The control circuit is connected to the field effect transistor and provides a current through a control current path to produce the field effect transistor input voltage. A compensation circuit is connected to the control circuit. The compensation circuit includes a compensation transistor of the same type as the field effect transistor. The compensation circuit operates the compensation transistor to divert current from said control path whereby process variations cause the compensation transistor to draw a current of a magnitude to provide an input voltage to the field effect transistor to enable such field effect transistor to produce said predetermined level of bias current. A transistor switch is provided having a first and second electrode. Conductivity between such first and second electrodes is controlled by an &ldquo;on&rdquo;/&ldquo;off&rdquo; control signal fed to a control electrode of such transistor switch. One of such first and second electrodes is coupled to the gate of the field effect transistor and the other one of the first and second electrodes is coupled to a predetermined reference potential. The transistor switch is placed in a conductive condition by the &ldquo;on&rdquo;/&ldquo;off &rdquo; control signal to couple the gate of the field effect transistor to such reference potential during an &ldquo;off&rdquo; condition of the control signal. Such coupling to the reference potential turns the field effect transistor to a non-conducting state during such &ldquo;off&rdquo; condition. The transistor switch is placed in a non-conductive condition to de-couple the gate of the field effect transistor from such reference potential during an &ldquo;on&rdquo; condition of the control signal to enable the field effect transistor to amplify a signal fed to the gate thereof during such &ldquo;on&rdquo; condition. The reference potential is coupled to the control circuit. The field effect transistor, the compensation transistor and the transistor switch are depletion mode field effect transistors. The compensation circuit is coupled between a second reference potential and the first-mentioned reference potential.

Current shutdown circuit for active bias circuit having process variation compensation

An amplifier having a two different single crystal semiconductor substrates. A first one of the substrates has formed thereon at least one input signal amplifying device, such device comprising a bipolar transistor. A second one of the substrates is a material different from the material of the first substrate. A current mirror is included. The current mirror includes a plurality of electrically interconnected active devices, one portion of the devices being bipolar devices formed on the first substrate and another portion of the active devices comprising an insulated gate field effect transistor formed on the second substrate. The first single crystal substrate is III-V material and the second single crystal substrate is silicon. The bipolar devices are HBTs. The insulated gate field effect transistor is a MOS device. This configuration minimizes the effect of temperature, voltage and process variations on critical transistor operating currents.

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Marlborough, MA, United States of America

John A DeFalco