Intel Corporation

Ati Technologies Ulc

Real 3-D

John A Carey

Michael Mantor

Aditya Sreenivas

Ralph Clayton Taylor

Thomas A Piazza

Angel E Socarras

Kim A Meinerth

Kam Leung

Brian D Rauchfuss

Krishnan Sreenivas

Mitchell H Singer

Jeffrey D Potter

Sajjad A Zaidi

R Scott Hartog

Raymond E Debs

A method and apparatus for providing rendering of subsections of screen space receives render commands associated with different screen subsections, such as from a command buffer populated by a coprocessor, and determines which screen section is currently being rendered by a rendering engine, or stated another way, which screen section the host processor wishes to have rendered, and evaluates screen subsection data that is associated with a received rendering command. The screen subsection data identifies a screen subsection for which the command refers. The method includes executing the command if it is determined that the command refers to a current screen section being rendered.

Display screen subsection rendering apparatus and method

A 3D rendering texture caching scheme that minimizes external bandwidth requirements for texture and increases the rate at which textured pixels are available. The texture caching scheme efficiently pre-fetches data at the main memory access granularity and stores it in cache memory. The data in the main memory and texture cache memory is organized in a manner to achieve large reuse of texels with a minimum of cache memory to minimize cache misses. The texture main memory stores a two dimensional array of texels, each texel having an address and one of N identifiers. The texture cache memory has addresses partitioned into N banks, each bank containing texels transferred from the main memory that have the corresponding identifier. A cache controller determines which texels need to be transferred from the texture main memory to the texture cache memory and which texels are currently in the cache using a least most recently used algorithm. By labeling the texture map blocks (double quad words), a partitioning scheme is developed which allow the cache controller structure to be very modular and easily realized. The texture cache arbiter is used for scheduling and controlling the actual transfer of texels from the texture main memory into the texture cache memory and controlling the outputting of texels for each pixel to an interpolating filter from the cache memory.

3-D rendering texture caching scheme

An apparatus for an efficient display flip is disclosed. The apparatus has a computer readable medium having a graphics driver. The execution of the graphics driver is configured to generate instructions for checking status of a graphics device to determine whether the graphics device is ready to display a next frame data on a display device. The graphics device is coupled to a system memory. The graphics device is configured to forwarding a display flip status to the system memory for access by the graphics driver in response to the instructions.

Efficient display flip

The invention, in one embodiment, is a method for performing direct memory access. The method includes arbitrating between a chained, low priority, direct memory access and a high priority, direct memory access, the arbitration occurring between two links in the chained, low priority, direct memory access.

Technique for performing DMA including arbitration between a chained low

A pipeline apparatus for processing 3D graphics data will be described. The pipeline apparatus includes a first request memory to fetch information corresponding to a texture operand. A second request memory fetches information responding to a color operand and Z operand. A control circuit coordinates data flow from the first request memory and the second request memory into a memory channel by preventing the number of requests from the first request memory from exceeding by a predetermined number, the number of requests from the second request memory. By properly coordinating the data flow, deadlock of a data fetching pipeline is avoided.

Data skew management of multiple 3-D graphic operand requests

Growing community of inventors

Winter Springs, FL, United States of America

John A Carey