Dialog Semiconductor B.v.

Johannes Steensma

Wessel Harm Lubberhuizen

Ashley Hughes

A digital signal processing system for multiplying a digital value and a digital signal. The digital signal processing system receives the digital value in an encoded format, and multiplies the digital value with the digital signal. The digital value in the encoded format has an offset, which is encoded as a floating point. The disclosure provides a digital processing system that can carry out a multiplication operation with a smaller area, less complexity and/or reduced power usage compared with known multipliers.

Digital signal processing system

A digital filter structure and related method of digital filtering are presented. The digital filter structure is arranged to receive one or more clocked input signals having a first clock rate, and which is driven at a second clock rate higher than said first clock rate. The digital filter structure has a plurality of delay elements and multiplexing circuitry arranged to selectively engage the delay elements such that, at every clock cycle of the digital filter structure, a filter operation is performed on a different stream of data. The disclosure can be applied in many different contexts. One particular implementation example is that of an adaptive noise cancellation (ANC) system using sigma-delta infinite impulse response filters. In this context the present disclosure minimizes latency and hardware implementation area by requiring only one filtering circuit for multiple channels of data to be filtered.

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Satellite Beach, FL, United States of America

Johannes Steensma