Nxp B.v.

Johannes H A Brekelmans

Erwin Janssen

Bram Nauta

Jan Van Sinderen

Konstantinos Doris

Xin He

Lorenzo Tripodi

Vincent Rambeau

Eric A M Klumperink

Zhiyu Ru

Leonardus H M Hesen

Marc G M Notten

Sebastien Amiot

A polyphase harmonic rejection mixer, comprising a plurality of stages following each other; wherein a first stage is arranged to perform at least frequency conversion; and a second stage is arranged to perform at least selective weighting and combining; wherein at least two of the plurality of stages are arranged to perform at least combining. In an embodiment, the first stage () comprises three single-ended gain blocks (), arranged to perform selective weighting, frequency conversion and combining; and a second stage () following the first stage () and arranged to perform selective weighting and combining. The second stage () may reduce the number of phases output by the first stage () and may output () a complex differential down converted signal. The mixer may be directly interfaced to an antenna of an LNA-less receiver without weighting in the first stage. The mixer may be included in a software-defined radio.

Polyphase harmonic rejection mixer

A circuit for producing multiple switching control signals for a harmonic rejection mixer from multiple phases of a digital local oscillator signal is presented, wherein a first waveform combiner circuit is arranged to generate from the multiple phases of the digital local oscillator signal at least one switching control signal by logical combining two from the multiple phases of a digital local oscillator signal, and a second waveform combiner circuit is arranged to generate from the multiple phases of the digital local oscillator signal at least one first switching control signal by logical combining one from the multiple phases of a digital local oscillator signal with a predetermined signal having a static logical value. To compensate for phase errors the schematic topology of the first and the second waveform combiner circuit are arranged to be fully symmetrical to each other in that in the first waveform combiner, the circuit part for providing the function of the second waveform combiner is used as a dummy circuit, and in the second waveform combiner, a circuit part for providing the function of the first waveform combiner is used as a dummy circuit. Accordingly, the sources for providing the multiple phases of the digital local oscillator signal see the same load, and hence required phase shift is guaranteed.

Calibration-free local oscillator signal generation for a harmonic-rejection mixer

There is provided a method and apparatus for maintaining a bias current that flows through two transistors at a target level. The two transistors are both connected to form a series network between positive and negative voltage supply terminals. The bias current flows through the two transistors when the circuit is at equilibrium, and the threshold voltage of the transistors is controlled by controlling the voltage that is applied to the transistors bulk terminals. In addition to the two transistors, there is provided a control circuit that measures a circuit parameter that is indicative of the level of bias current flowing through the two transistors. In response to the measured parameter, the control circuit adjusts the bulk voltage levels of the two transistors so as to alter the transistors threshold voltages and maintain the level of bias current at a target level.

Amplifier circuit

An antenna assembly for wireless communication equipment comprises an antenna structure comprising at least a loop type antenna arranged to deliver a first current when it is used in a balanced mode and/or a second current when it is used in an unbalanced mode with respect to a ground plane from received radio signals, and current extraction device coupled to the antenna structure and arranged to be placed in at least a first state in which the current extraction device delivers the first or second current and a second state in which the current extraction device simultaneously delivers the first and second currents either separately or mixed together.

Diversity antenna assembly for wireless communication equipment

A frequency-division circuit comprises a pair of multi-state circuits (MSCA, MSCB). Each multi-state circuit can be switched throughout a cycle of states (SA(), . . . , SA(N); SB(), . . . , SB(N)). One multi-state circuit (MSCA) switches to a next state in response to a rising edge (Er) in an input signal (OS). The other multi-state circuit (MSCB) switches to a next state in response to a falling edge (Ef) in the input signal (OS). Each multi-state circuit (MSCA, MSCB) has at least one state (SA(), SB()) in which the multi-state circuit inhibits the other multi-state circuit (MSCB, MSCA) so as to prevent the other multi-state circuit from switching to the next state.

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Nederweert, Netherlands

Johannes H A Brekelmans