Nxp B.v.

Johannes Adrianus Maria De Boet

Stephan Jo Cecile Henri Theeuwen

Henk Jan Peuscher

Paul Bron

Stephan Jo Cecil Henri Theeuwen

Jos Gerjan Eusebius Klappe

The invention relates to an electronic device comprising an RF-LDMOS transistor () and a protection circuit () for the RF-LDMOS transistor. The protection circuit () comprises: i) an input terminal (Ni) coupled to a drain terminal (Drn) of the RF-LDMOS transistor (); ii) a clipping node (Nc); iii) a clipping circuit () coupled to the clipping node (Nc) for substantially keeping the voltage on the clipping node (Nc) below a predefined reference voltage, wherein the predefined reference voltage is designed to be larger than the operation voltage on the drain terminal (Drn) and lower than a trigger voltage of a parasitic bipolar transistor () that is inherently present in the RF-LDMOS transistor; iv) a capacitance (Ct) coupled between the clipping node (Nc) and a further reference voltage terminal (Gnd), and v) a rectifying element (D, D) connected with its anode terminal to the input terminal (Ni) and with its cathode terminal to the clipping node (Nc). The invention provides an RF-LDMOS transistor having an improved RF ruggedness, while not, or at least to a much lesser extent, compromising the RF performance of the RF-LDMOS transistor.

Electronic device comprising RF-LDMOS transistor having improved ruggedness

Disclosed is a circuit () comprising a transistor () coupled between a supply voltage line () and ground (), the transistor comprising a control terminal coupled to a input signal line (), the circuit further comprising first and second bipolar transistors () coupled in series between the input signal line () and ground (), wherein the base of the first bipolar transistor is connected to the input signal line and the base of the second bipolar transistor is connected to ground.

ESD protection circuit

Laterally diffused metal oxide semiconductor transistor for a radio frequency-power: amplifier comprising a drain finger () which drain finger is connected to a stack of one or more metal interconnect layers, () wherein a metal interconnect layer () of said stack is connected to a drain region () on the substrate, wherein said stack comprises a field plate () adapted to reduce the maximum magnitude of the electric field between the drain and the substrate and overlying the tip of said drain finger.

LDMOS having a field plate

The MOS transistor () of the invention comprises a gate electrode (), a channel region (), a drain contact region () and a drain extension region () mutually connecting the channel region () and the drain contact region (). The MOS transistor () further comprises a shield layer () which extends over the drain extension region () wherein the distance between the shield layer () and the drain extension region () increases in a direction from the gate electrode () towards the drain contact region (). In this way the lateral breakdown voltage of the MOS transistor () is increased to a level at which the MOS transistor () may fulfill the ruggedness requirement for broadcast applications for a supply voltage higher than that used in base station applications.

Growing community of inventors

Beuningen, Netherlands

Johannes Adrianus Maria De Boet