Infineon Technologies Austria Ag

Infineon Technologies Ag

Johanna Schlaminger

Ravi Keshav Joshi

Juergen Steinbrenner

Matteo Dainese

Peter Zorn

Andreas Behrendt

Petra Fischer

Michael Ehmann

Saurabh Roy

Johann Schmid

Hiroshi Narahashi

Katharina Teichmann

Richard Gaisberger

Monika Cornelia Voerckel

Sigrid Wabnig

Mario Stanovnik

Anita Satz

A method for fabricating a semiconductor device comprises depositing a TiW layer on a semiconductor substrate, depositing a Ti layer on the TiW layer, depositing a Ni alloy layer on the Ti layer, depositing an Ag layer on the Ni alloy layer, at least partially covering the Ag layer with photoresist, wet etching the Ag layer and the Ni alloy layer, and dry etching the Ti layer and the TiW layer.

Method for fabricating a semiconductor device using wet etching and dry etching and semiconductor device

Described herein is a method and a power semiconductor device produced by the method. The method includes: forming a structured metallization layer above a semiconductor substrate; forming a protective layer on the structured metallization layer; forming a first passivation over the structured metallization layer with the protective layer interposed between the first passivation and the structured metallization layer; structuring the first passivation to expose one or more regions of the protective layer; removing the one or more exposed regions of the protective layer to expose one or more parts of the structured metallization layer; and after structuring the first passivation and removing the one or more exposed regions of the protective layer, forming a second passivation on the first passivation and electroless plating the one or more exposed parts of the structured metallization layer.

Passivation structuring and plating for semiconductor devices

According to various embodiments, a method for processing an electronic device may include: forming a patterned hard mask layer over a power metallization layer, the patterned hard mask layer exposing at least one surface region of the power metallization layer; and patterning the power metallization layer by wet etching of the exposed at least one surface region of the power metallization layer.

Method for patterning a power metallization layer, electronic device and method for processing an electronic device

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Villach, Austria

Johanna Schlaminger