Sige Semiconductor, Inc.

Nortel Networks Corporation

Other

Zarbana Digital Fund LLC

Icefyre Semiconductor Corporation

Johan M Grundlingh

Gordon Glen Rabjohn

James Stuart Wight

Charles Tremlett Nicholls

Adrian Peter Long

Steve Andre Beaudin

John Jackson Nisbet

John Ilowski

James Wight

Edward J Whittaker

Howard James Smith

Russell Smiley

Robert Leroux

Kevin Parker

Eric C Valk

A circuit and method are provided for detecting a power of a signal amplified in a power amplifier. A diode and a voltage bias source are used to shift a voltage of the signal taken at a base of an amplifying transistor of the power amplifier, to generate a positive signal. The positive signal is provided to a base input of an emitter follower exhibiting high input impedance to generate a power detector output which follows the positive signal.

RF detector and method for detecting

Power detector and method for detecting power

A switched-mode power amplifier is configured for performing power amplification of a plurality of signals input thereto and integrally summing (combining) those signals. Conceptually, this is achieved by replacing the input winding of the transformer component of a transformer-coupled voltage switching amplifier with separate input components, one for each input signal, in similar manner to the configuration of the input components of a three-port combiner (trifilar). In a first transformer-containing category of embodiments of the invention, the input winding of the amplifier's transformer is comprised of a plurality of series-coupled windings, one for each of the plurality of input components/signals such that the input components constitute a series connection of low output impedance sources applied to the amplifier's resonator and load. This, in turn, provides a high level of isolation between the amplifier input components and results in a low level of loss. In a second non-transformer-containing category of embodiments of the invention, the transformer component is replaced by a transmission line impedance transformer, or a lumped element equivalent circuit, which transforms the low output impedance sources to high output impedance sources and those sources are connected in parallel (rather than in series per the first category of embodiments).

Switched-mode power amplifier integrally performing power combining

The invention relates to the field of electronics, more particularly to the wire bonds incorporated into an integrated circuit package such as a quad flat pack, a ball grid array or hybrid style module. The present invention takes the normally undesirable wire bond inductance and uses it in an operational circuit where positive inductance is required. The circuit in which the wire bond inductance is used is located primarily in the integrated circuit die housed in the integrated circuit package, but may also include off-die components. In one example, a wire bond is used as the required series inductance in a discrete circuit impedance inverter which consists of two shunt-to-ground negative inductances and one series positive inductance. One of the negative inductances is located on-die, while the other is located off-die.

Integrated circuit incorporating wire bond inductance

A collector boost circuit is disclosed for providing a first voltage in a first mode of operation to a power amplifier, and another voltage in a second mode of operation to the power amplifier. The collector boost circuit uses an indicator signal derived by an RF detector to switch between the first and the second mode of operation. The another voltage is a boosted voltage greater than the first voltage and is provided when required during peak excursions to prevent amplifier clipping through a boost capacitor. The another voltage is continuous and varies in accordance with the detected peak signal amplitude.

Integrated implementation of a voltage boost follower and method therefor

A method of reducing distortion in the output of an amplifier is provided. The method comprises subtractively combining an error signals with the appropriate phase shift with input signals to be amplified. The error signal being generated by subtractively combining a fed-forward portion of the input signal with a portion of the fed-back amplified output signal, and signal processing applied to it between its generation and application to correcting the input signal in the baseband domain. The error therefore being down-converted, filtered, and up-converted in the feedback path. The filtered baseband error signal components providing inputs to a controller which adjusts active elements of the amplification and feedback path in order to minimize the distortion within the output of the amplifier.

Method and apparatus for distortion correction of RF amplifiers

A method of reducing distortion in the output of an amplifier is provided. The method comprises subtractively combining baseband error signals with the appropriate phase shift with baseband input signals, the baseband error signals generated by subtractively combining delayed fed-forward portions of the baseband input signals with baseband converted portions of a fed-back amplified output signal, the amplified output signal being a distorted replica of combined up-converted baseband input signals. The baseband error signals being filtered prior to the combining function, and also providing inputs to a controller which adjusts active elements of the amplification and fed-back paths in order to minimize the distortion within the output of the amplifier.

Method and apparatus for a cartesian error feedback circuit to correct distortion within a power amplifier

The invention relates to the field of electronics, more particularly to the wire bonds incorporated into an integrated circuit package such as a quad flat pack. a ball grid array or hybrid style module. The present invention takes the normally undesirable wire bond inductance and uses it in an operational circuit where positive inductance is required. The circuit in which the wire bond inductance is used is located primarily in the integrated circuit die housed in the integrated circuit package, but may also include off-die components. In one example, a wire bond is used as the required series inductance in a discrete circuit impedance inverter which consists of two shunt-to-ground negative inductances and one series positive inductance. One of the negative inductances is located on-die, while the other is located off-die.

Improved methods and systems for amplifying a signal are provided. Specifically, systems and methods for amplifying a signal through a lossy switch element tied to two or more voltage sources are provided. In the preferred embodiment, envelope information from the signal is used to smoothly transition between the two or more voltage sources to provide signal amplification over an increased range.

Power amplifier

Embodiments of the present invention comprise methods and devices for amplifying a signal by amplifying a first signal and by then amplifying a second signal only if the first signal exceeds a predetermined threshold. The first and second amplified signals are then combined, and the combination is fed back to a signal source and used to control the values of the first and second signal. The combination is further transmitted to a load. In the preferred embodiment, the first amplified signal is transmitted through an impedance inverter before it is combined with the second amplified signal.

A switched-mode Class F power amplifier is provided for parallel connection with at least one other like amplifier, within a Chireix architecture, for combining the signals output therefrom. An input component includes at least one active device configured to be alternately switched by a signal input thereto to present an amplified signal corresponding to the input signal and constituting a low output impedance voltage source. A lumped element impedance inverter is provided between the input component and an output resonator component, the impedance inverter being configured for transforming the low output impedance voltage source to instead constitute a high output impedance current source configured for said parallel connection. In accordance with the invention, the negative reactive component values required by the impedance inverter are eliminated and effectively provided by incorporating those values into pre-selected reactive components of the input and output components. Further, a source-drain parasitic capacitance across the active device is eliminated by one or more pre-selected reactive components of the input component, the value(s) of which effectively compensate for the parasitic capacitance.

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Kinburn, Canada

Johan M Grundlingh