Nxp B.v.

Johan Corneel Meirlevede

Tom Waayers

Hervé Fleury

Paul-Henri Pugliesi-Conti

Vincent Chalendard

Ruediger Solbach

Michael Rodat

Jozef R Poels

David P Price

Norbert Schomann

Testing of integrated circuitry, wherein the integrated circuitry includes a flip-flop with an asynchronous input, so that during performance of asynchronous scan patterns, glitches are avoided. Combinatorial logic circuitry delivers a local reset signal to the asynchronous input independent of an assertion of an asynchronous global reset signal. A synchronous scan test is performed of delivery of the local reset signal from the combinatorial logic circuitry while masking delivery of any reset signal to the asynchronous input of the flip-flop. An asynchronous scan test is performed of an asynchronous reset of the flip-flop with the asynchronous global reset signal while masking delivery of the local reset signal to the asynchronous input of the flip-flop.

Testing of asynchronous reset logic

A method is provided for testing an integrated circuit comprising multiple cores, with at least two cores having different associated first and second clock signals of different frequencies. A test signal is provided using a clocked scan chain clocked at a test frequency (TCK). A transition is provided in a clock circuit reset signal (clockdiv_rst) which triggers the operation of a clock divider circuit () which derives the first and second clock signals (clk_xx, clk_yy, clk_zz) from an internal clock () of the integrated circuit. The first and second clock signals thus start at substantially the same time, and these are used during a test mode to perform a test of the integrated circuit. After test, the test result is output using the clocked scan chain clocked at the test frequency (TCK). Clocking hardware is also provided, and these provide at-speed testing which enables on the fly switching between a relatively slow tester driven clock for the shift modes and faster clocks generated by on-chip PLLs and divider circuits for the test mode.

IC testing methods and apparatus

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Doorwerth, Netherlands

Johan Corneel Meirlevede