Ams Ag

Sciosense B.v.

Joerg Siegert

Franz Schrank

Thomas Bodner

Martin Schrems

Jochen Kraft

Cathal Cassidy

Willem Frederik Adrianus Besling

Jens Hofrichter

Olaf Wunnicke

Remco Henricus Wilhelmus Pijnenburg

Helene Gehles

Hubert Enichlmair

Coenraad Cornelis Tak

Alessandro Faes

Bernhard Loeffler

Gregor Toschkoff

Ewald Stueckler

Cas Van Der Avoort

Sophie Guillemin

Miklos Labodi

Karl Tuttner

An intermetal dielectric and metal layers embedded in the intermetal dielectric are arranged on a substrate of semiconductor material. A via hole is formed in the substrate, and a metallization contacting a contact area of one of the metal layers is applied in the via hole. The metallization, the metal layer comprising the contact area and the intermetal dielectric are partially removed at the bottom of the via hole in order to form a hole penetrating the intermetal dielectric and extending the via hole. A continuous passivation is arranged on sidewalls within the via hole and the hole, and the metallization contacts the contact area around the hole. Thus the presence of a thin membrane of layers, which is usually formed at the bottom of a hollow through-substrate via, is avoided.

Semiconductor device with through-substrate via and method of manufacturing a semiconductor device with through-substrate via

The disclosure relates to a method for manufacturing a planarized etch-stop layer, ESL, for a hydrofluoric acid, HF, vapor phase etching process. The method includes providing a first planarized layer on top of a surface of a substrate, the first planarized layer having a patterned and structured metallic material and a filling material. The method further includes depositing on top of the first planarized layer the planarized ESL of an ESL material with low HF etch rate, wherein the planarized ESL has a low surface roughness and a thickness of less than 150 nm, in particular of less than 100 nm.

Method for manufacturing an etch stop layer and MEMS sensor comprising an etch stop layer

In an embodiment a pressure sensor device includes a substrate body, a pressure sensor having a membrane and a cap body having at least one opening, wherein the pressure sensor is arranged between the substrate body and the cap body in a vertical direction which is perpendicular to a main plane of extension of the substrate body, and wherein the mass of the substrate body amounts to at least 80% of the mass of the cap body and at most 120% of the mass of the cap body.

Pressure sensor device and method for forming a pressure sensor device

A method for manufacturing an optical sensor is provided. The method comprises providing an optical sensor arrangement which comprises at least two optical sensor elements on a carrier, where the optical sensor arrangement comprises a light entrance surface at the side of the optical sensor elements facing away from the carrier. The method further comprises forming a trench between two optical sensor elements in a vertical direction which is perpendicular to the main plane of extension of the carrier, where the trench extends from the light entrance surface of the sensor arrangement at least to the carrier. Moreover, the method comprises coating the trench with an opaque material, forming electrical contacts for the at least two optical sensor elements on a back side of the carrier facing away from the optical sensor elements, and forming at least one optical sensor by dicing the optical sensor arrangement along the trench. Each optical sensor comprises an optical sensor element, and the light entrance surface is free of electrical contacts and at least partially free of the opaque material above the optical sensor elements. Furthermore, an optical sensor is provided.

Method for manufacturing an optical sensor and optical sensor

The semiconductor device for detection of radiation comprises a semiconductor substrate () with a main surface (), a dielectric layer () comprising at least one compound of a semiconductor material, an integrated circuit () including at least one component sensitive to radiation (), a wiring () of the integrated circuit embedded in an intermetal layer () of the dielectric layer (), an electrically conductive through-substrate via () contacting the wiring, and an optical filter element () arranged immediately on the dielectric layer above the component sensitive to radiation. The dielectric layer comprises a passivation layer () at least above the through-substrate via, the passivation layer comprises a dielectric material that is different from the intermetal layer (), and the wiring is arranged between the main surface and the passivation layer.

Semiconductor device for detection of radiation and method of producing a semiconductor device for detection of radiation

A semiconductor device has a semiconductor substrate and a first metallization stack arranged on the substrate. The substrate has and/or carries a plurality of electronic circuit elements. The first metallization stack has electrically insulating layers and at least one metallization layer. The semiconductor device further has a second metallization stack arranged on the first metallization stack and comprising further electrically insulating layers and an optical waveguide layer. The optical waveguide layer has at least one optical waveguide structure. Furthermore, one of the electrically insulating layers and one of the further electrically insulating layers are in direct contact with each other and form a pair of directly bonded layers.

Semiconductor device with photonic and electronic functionality and method for manufacturing a semiconductor device

A top surface of a substrate is provided with a detection element for detecting electromagnetic radiation. A refractive element is formed by a portion of a cover element, which is attached to the substrate, so that the refractive element is arranged facing the detection element. The refractive element may be arranged within a recess of the cover element, so that a cavity is formed between the detection element and the refraction element.

Optoelectronic device with a refractive element and a method of producing such an optoelectronic device

The semiconductor device comprises a semiconductor wafer with an integrated circuit, formed by a plurality of dies, a further semiconductor wafer, which differs from the semiconductor wafer in diameter and semiconductor material, the semiconductor wafer and the further semiconductor wafer being bonded to one another by means of a bonding layer, and an electrically conductive contact layer arranged on the further semiconductor wafer opposite to the bonding layer.

Semiconductor device for wafer-scale integration

A photosensor () is arranged in a semiconductor substrate () at a main surface (), a dielectric layer () is arranged on or above the main surface, the dielectric layer including a metal layer () electrically connected with the photosensor, and an aperture layer () formed from an opaque or semitransparent material is arranged on or above the dielectric layer. The aperture layer is provided with an array of transparent aperture zones () above the photosensor, each of the aperture zones penetrating the aperture layer.

Semiconductor device comprising an aperture array and method of producing such a semiconductor device

According to the improved concept, a method for analyzing a semiconductor element comprising polymer residues located on a surface of the semiconductor element is provided. The method comprises marking at least a fraction of the residues by exposing the semiconductor element to a fluorescent substance and detecting the marked residues by visualizing the marked residues on the surface of the semiconductor element using fluorescence microscopy.

Method and arrangement for analyzing a semiconductor element and method for manufacturing a semiconductor component

A relief structure is formed on a surface of a carrier provided for accommodating a wafer, which is fastened to the carrier by a removable adhesive contacting the carrier. The relief structure, which may be spatially confined to the center of the carrier, reduces the strength of adhesion between the wafer and the carrier. If the adhesive is appropriately selected and maintains the connection between the wafer and the carrier at elevated temperatures, further process steps can be performed at temperatures of typically 300&#xb0; C. or more. The subsequent mechanical separation of the adhesive joint is facilitated by the relief structure on the carrier.

Method of producing a removable wafer connection and carrier for wafer support

The semiconductor device comprises a substrate () of semiconductor material, a dielectric layer () above the substrate, a waveguide () arranged in the dielectric layer, and a mirror region () arranged on a surface of a mirror support () integrated on the substrate. A mirror is thus formed facing the waveguide. The surface of the mirror support and hence the mirror are inclined with respect to the waveguide.

Semiconductor device with integrated mirror and method of producing a semiconductor device with integrated mirror

The method of wafer-scale integration of semiconductor devices comprises the steps of providing a semiconductor wafer (), a further semiconductor wafer (), which differs from the first semiconductor wafer in at least one of diameter, thickness and semiconductor material, and a handling wafer (), arranging the further semiconductor wafer on the handling wafer, and bonding the further semiconductor wafer to the semiconductor wafer. The semiconductor device may comprise an electrically conductive contact layer () arranged on the further semiconductor wafer () and a metal layer connecting the contact layer with an integrated circuit.

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Graz, Austria

Joerg Siegert