Intel Corporation

Joerg Hartung

Richard Paul Mangold

Jawad Basit Khan

Sowmiya Jayachandran

Steffen Kosinski

Simon Ramage

Jason A Gayman

Jonathan E Schmidt

Curtis A Gittens

Jason K Yu

Jack Cummings

Systems, apparatuses and methods may provide for firmware access wrapper technology that includes a plurality of input registers communicatively coupled to a hardware power controller, a plurality of output registers communicatively coupled to the hardware power controller, and a processor communicatively coupled to the input registers and the output registers. The processor may include configurable logic to identify a control policy change with respect to the hardware power controller, detect input signal information in one or more of the input registers, and conduct a modification of one or more values in the output registers based on the control policy change and the input signal information.

Hybrid hardware/firmware power management controller for media devices

A mechanism is described for facilitating power governance of non-volatile memory devices using a power governing mechanism employed at a computing device according to one embodiment of the invention. A method of embodiments of the invention includes maintaining a credit pool having a plurality of credits to be released to a plurality of memory channels associated with a plurality of non-volatile memory devices. The plurality of credits may be used to provide sufficient power to perform memory operations associated with a computing device. The method may further include receiving a credit request having a petition to obtain one or more credits for a memory channel of the plurality of memory channels to facilitate performance of a memory operation, determining whether the one or more credits are available in the credit pool, and retrieving the one or more credits from the credit pool, if the one or more credits are available in the credit pool. The method may further include releasing the one or more credits to the memory channel. The one or more released credits are used to perform the memory operation.

Mechanism for facilitating power and performance management of non-volatile memory in computing devices

Examples are disclosed for identifying read/write access collisions for a storage medium. In some examples, a plurality of write access requests for access to a storage medium may be received at a controller for a storage medium. The plurality of write access requests may be associated with separate logical block address (LBA) ranges. The separate write LBA ranges may be stored to sets of first registers. A read access request to the storage medium may also be received and a read LBA range associated with the read access request may be stored to a set of second registers. The separate stored write LBA ranges may then be compared to the read LBA range to identify overlapping ranges that may indicate read/write access collisions to the storage medium. Other examples are described and claimed.

Techniques for identifying read/write access collisions for a storage medium

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Vancouver, Canada

Joerg Hartung