Siltronic Ag

Joerg Haberecht

Reinhard Schauer

Rene Stein

Stephan Heinrich

Georg Brenninger

Christian Hager

Variations in wafer thickness due to non-uniform CVD depositions at angular positions corresponding to crystallographic orientation of the wafer are reduced by providing a ring below the susceptor having inward projections at azimuthal positions which reduce radiant heat impinging upon the wafer at positions of increased deposition.

Method for depositing an epitaxial layer on a front side of a semiconductor wafer, and device for carrying out the method

A semiconductor wafer comprises a substrate wafer of monocrystalline silicon and a dopant-containing epitaxial layer of monocrystalline silicon atop the substrate wafer, wherein a non-uniformity of the thickness of the epitaxial layer is not more than 0.5% and a non-uniformity of the specific electrical resistance of the epitaxial layer is not more than 2%.

Epitaxially coated semiconductor wafer of monocrystalline silicon and method for production thereof

A method deposits an epitaxial layer on a front side of a semiconductor wafer having monocrystalline material. The method includes: providing the semiconductor wafer; arranging the semiconductor wafer on a susceptor; heating the semiconductor wafer to a deposition temperature using thermal radiation directed to the front side and to the rear side of the semiconductor wafer; conducting a deposition gas over the front side of the semiconductor wafer; and selectively reducing an intensity of a portion of the thermal radiation that is directed to the rear side of the semiconductor wafer, as a result of which first partial regions at an edge of the semiconductor wafer, in the first partial regions a growth rate of the epitaxial layer is greater than in adjacent second partial regions given uniform temperature of the semiconductor wafer owing to an orientation of the monocrystalline material, are heated more weakly.

Method for depositing an epitaxial layer on a front side of a semiconductor wafer and device for carrying out the method

Coated semiconductor wafers are produced by introducing a process gas through first gas inlet openings along a first flow direction into a reactor chamber and over a substrate wafer of semiconductor material lying on a susceptor in order to deposit a layer on the substrate wafer, whereby material derived from the process gas precipitates on a preheat ring arranged around the susceptor; extracting the coated substrate wafer from the reactor chamber; and subsequently removing material precipitate from the preheat ring by introducing an etching gas through the first gas inlet openings into the reactor chamber along the first flow direction over the preheat ring and also through second gas inlet openings between which the first gas inlet openings are arranged, along further flow directions which intersect with the first flow direction.

Method and device for producing coated semiconductor wafers

A susceptor for holding a semiconductor wafer during the deposition of an epitaxial layer on a front side of the semiconductor wafer, has a susceptor ring and a susceptor base, and recesses below the susceptor ring in the susceptor base which are arranged in a manner distributed rotationally symmetrically. The radial width of the recesses is greater than the radial width of the susceptor such that the susceptor ring does not completely cover the recesses.

Susceptor for holding a semiconductor wafer, method for depositing an epitaxial layer on a front side of a semiconductor wafer, and semiconductor wafer with epitaxial layer

Epitaxially coated silicon wafers are produced by placing a wafer polished on its front side on a susceptor in an epitaxy reactor, first pretreating under a hydrogen atmosphere and in a second and a third step with addition of an etching medium to the hydrogen atmosphere, and subsequently providing an epitaxial layer, wherein during the first and second steps the hydrogen flow rate is 20-100 slm, during the second and third steps the flow rate of the etching medium is 0.5-1.5 slm, during the second step the average temperature in the reactor chamber is 950-1050&#xb0; C., and the power of heating elements above and below the susceptor is regulated such that there is a temperature difference of 5-30&#xb0; C. between a radially symmetrical region encompassing the central axis of and a part lying outside this region; and during the third step the hydrogen flow rate is reduced to 0.5-10 slm. In a second method, during the third pretreatment step the flow rate of the etching medium is increased to 1.5-5 slm, while the hydrogen flow rate does not have to be reduced.

Methods for producing epitaxially coated silicon wafers

Epitaxially coated silicon wafers, are coated individually in an epitaxy reactor by a procedure in which a silicon wafer on a susceptor in the epitaxy reactor, is pretreated in a first step with a hydrogen flow rate of 1-100 slm and in a second step with hydrogen and an etching medium at a hydrogen flow rate of 1-100 slm, and an etching medium flow rate of 0.5-1.5 slm, at an average temperature of 950-1050&#xb0; C., and is subsequently coated epitaxially, wherein, during the second pretreatment step, the power of heating elements is regulated such that there is a temperature difference of 5-30&#xb0; C. between a radially symmetrical central region of the silicon wafer and an outer region of the silicon outside the central region.

Method for producing epitaxially coated silicon wafers

Silicon wafers polished on their front sides are individually placed on a susceptor in an epitaxy reactor and firstly pretreated under a hydrogen atmosphere, and secondly with addition of an etching medium with a flow rate of 1.5-5 slm to the hydrogen atmosphere, the hydrogen flow rate being 1-100 slm in both steps, and subsequently epitaxially coated on the polished front side, and then removed from the reactor. In a second method, gas flows introduced into the reactor by injectors are distributed into outer and inner zones of the chamber, such that the inner zone gas flow acts on a wafer central region and the outer zone gas flow acts on a wafer edge region, the inner/outer distribution of the etching medium I/O=0-0.75. Silicon wafers having an epitaxial layer having global flatness value GBIR of 0.02-0.06 &#x3bc;m, relative to an edge exclusion of 2 mm are produced.

Growing community of inventors

Freiberg, Germany

Joerg Haberecht