Kawasaki Microelectronics, Inc.

Other

Kawasaki Lsi U.s.a., Inc.

Joel Silverman

Michael D Rostoker

Michael D Aronson

A protocol translation cable assembly includes a first connector having a first plurality of pins, a second connector having a second plurality of pins, and an electrical cable coupling the first connector to the second connector, where the electrical cable includes a plurality of conductors. The protocol translation cable assembly further includes translation circuitry coupled to at least some of the plurality of wires of the electric cable at points between the first plurality of pins of the first connector and the second plurality of pins of the second connector. The translation circuitry preferably derives its power from the electrical cable such that separate power supplies are not required. The cable assembly therefore provides transparent 'plug-and-play' capabilities.

Plug-and-play cable with protocol translation

An interface device is provided which enables communications between devices having disparate protocols (e.g., USB and Ethernet), and can be fabricated on a single integrated circuit (IC) chip. A system incorporating the interface device provides plug-and-play capability for both MAC and nonMAC environments. A &ldquo;smart&rdquo; cable incorporating the interface device has the ability to recognize what type of external device using what type of protocol is connected to the &ldquo;other&rdquo; end of the cable, thereby enabling a host to communicate with the external device. An electronic component (e.g., integrated circuit) incorporating the technique is suitably included in a system or subsystem having electrical functionality, such as general purpose computers, telecommunications devices, and the like.

Configurable universal serial bus (USB) controller implemented on a single integrated circuit (IC) chip with media access control (MAC)

Plug-and-play data cable with protocol translation

A digital protocol translator including a first protocol circuitry having a first I/O port adapted to communicate using a first digital protocol, the first protocol circuitry including a first controller. The translator further includes a second protocol circuitry having a second I/O port communicating using a second digital protocol different from the first digital protocol, the second protocol circuitry including a second controller in communication with the first controller, such that communications between the first I/O port and the second I/O port are translated between the first protocol and the second protocol. Preferably, the translator further includes a microprocessor and digital memory, where the microprocessor operates under the control of a program stored in the memory. Also preferably, the first controller includes a first state machine, a first plurality of registers, and a first DMA interface, and the second controller includes a second state machine, a second plurality of registers, and a second DMA interface.

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Mt. View, CA, United States of America

Joel Silverman