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Qualcomm Incorporated

Joel Kevin Jones

Robert Dreyer

Ananth Jasty

Michael Douglas Sharp

Ivan Dimitrov Baev

Method and apparatus for assigning processing work in parallel computing. A work unit is received in a parallel computing system that has more than one processing core. Each processing core is programmed with a different solution strategy. The work unit is then sent to each processing core, which then each apply their assigned solution strategy to the work unit. As each processing core operates, it maintains its own private state indicator. When one of the processing cores completes its work, then that processor is allowed to update a global system state indicator based on its own private state indicator. Other processing cores are prevented from doing likewise.

Method and apparatus for assigning processing work in parallel computing

A method and apparatus for detecting potential memory conflicts in a parallel computing environment by executing two parallel program threads. The parallel program threads include special operands that are used by a processing core to identify memory addresses that have the potential for conflict. These memory addresses are combined into a composite access record for each thread. The composite access records are compared to each other in order to detect a potential memory conflict.

Method and apparatus for detecting memory conflicts using distinguished memory addresses

Generating parallelized executable code from input code includes statically analyzing the input code to determine aspects of data flow and control flow of the input code; dynamically analyzing the input code to determine additional aspects of data flow and control flow of the input code; generating an intermediate representation of the input code based at least in part on the aspects of data flow and control flow of the input code identified by the static analysis and the additional aspects of data and control flow of the input code identified by the dynamic analysis; and processing the intermediate representation to determine portions of the intermediate representation that are eligible for parallel execution; and generating parallelized executable code from the processed intermediate representation.

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Alameda, CA, United States of America

Joel Kevin Jones