Atmel Corporation

Joe Yu

Geoffrey S Gongwer

Keith H Gudger

Neal Berger

Jinglun Eugene Tam

Steven A Sharp

Wendey E Mueller

James C Khong

A programmable logic device having a plurality of logic cells arranged in groups defining separate logic regions, both regional and multi-regional bus lines, and a crosspoint switch matrix which serves only to route signals from bus lines to inputs of the logic cells without logically combining two or more of the bus signals, i.e. without forming product terms. Rather, all logic is carried out by the logic cells themselves. In particular, the switch matrix is constructed so that each bus line can connect to one or more logic cell inputs, but each logic cell input can meaningfully connect to only one bus line without shorting. In one embodiment, each logic cell feeds one logic signal back to a regional bus line and can potentially feed back another logic signal through its region's universal select matrix to a universal bus line. The select matrix connects a subset of the region's potential feedback signals to the universal bus.

Programmable logic device with regional and universal signal routing

An integrated circuit package including a plurality of macrocells for connecting a logic circuit of the package to a plurality of external contacts of the package. At least one of the macrocells has an output driver that is enabled or disabled by a control signal for transmitting or preventing transmission of a logic signal to one of the contacts. The control signal is generated by a logic gate that receives and logically combines an individual output enable signal dedicated to that particular macrocell with a selected signal. One signal that may be selected is a regional output enable signal that is supplied to more than one macrocell. Each macrocell also has a feedback multiplexer selecting one signal to be sent to the logic circuit. Choices include a nonstored logic signal, a stored logic signal from a flip-flop register in the macrocell, a signal applied to the external contact associated with that macrocell, and a signal applied to another external contact associated with a different macrocell. A plurality of contacts are connected to feedback multiplexers in two different macrocells, and at least one contact connects in this manner to separate logic regions of the logic circuit. The flip-flop register in the macrocell has a choice of data inputs selected by another multiplexer from among at least one logic signal from the logic circuit and at least one signal applied to an external contact.

Integrated logic circuit with functionally flexible input/output

Growing community of inventors

Palo Alto, CA, United States of America

Joe Yu