Cirrus Logic Inc.

Joe Welser

Krishnan Subramoniam

Anand Venkitachalam

Dylan Alexander Hester

Rajendra Datar

Manoj Shridhar Soman

An integrated analog to digital and sample rate converter includes sampling circuitry for receiving an analog signal and generating a single or multibit stream of digital signals at a first rate. A leaky integrator filter removes quantization noise from the stream of samples such that resampling can be carried out. Circuitry resamples the filtered stream of samples output from leaky integrator filter to generate an output stream of samples at a second rate.

Analog to digital converters with integral sample rate conversion and systems and methods using the same

A sample rate converter includes a filter for processing digital data in response to a clock controlled by a clock enable signal, the filter receiving the digital data at a first sampling rate and outputting digital data at a second sampling rate. Resampler circuitry generates first selected periods of the clock enable signal having a first duty cycle approximating a ratio between the first sampling rate and the second sampling rate. Selectively, selected periods of the clock enable signal are generated having a second duty cycle for minimizing an error accumulated over the first selected periods of the clock enable signal.

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Austin, TX, United States of America

Joe Welser