Samsung Electronics Co., Ltd.

Jiyoung Park

Donghyun Yeom

Dasom Lee

Yeongkwon Ko

Moonsoo Chang

Heejun You

Jun So Pak

Bo Pu

Seungki Nam

Yongha Choi

Hosin Song

Minsoo Shin

Wonjung Choi

Jihee Hong

A semiconductor package includes a semiconductor chip on a redistribution substrate and including a body, a chip pad on the body, and a pillar on the chip pad, a connection substrate including base layers and a lower pad on a bottom surface of a lowermost one of the base layers, a first passivation layer between the semiconductor chip and the redistribution substrate, and a dielectric layer between the redistribution substrate and the connection substrate. The first passivation layer and the dielectric layer include different materials from each other. A bottom surface of the pillar, a bottom surface of the first passivation layer, a bottom surface of a molding layer, a bottom surface of the lower pad, and a bottom surface of the dielectric layer are coplanar with each other.

Semiconductor package and method of fabricating the same

Provided is a semiconductor package including a redistribution substrate, a semiconductor chip on a top surface of the redistribution substrate, a first passive device and a second passive device on a bottom surface of the redistribution substrate and spaced apart, connection terminals on the bottom surface of the redistribution substrate, and an underfill layer between the first passive device and the redistribution substrate and between the second passive device and the redistribution substrate, the underfill layer intersecting a region between the first passive device and the second passive device and extending in the first direction, wherein the bottom surface of the redistribution substrate is exposed between the first passive device and a first connection terminal closest to the first passive device in the first direction, and between the second passive device and a second connection terminal closest to the second passive device in an opposite direction to the first direction.

Semiconductor package

An electronic device according to various embodiments of the present disclosure includes: at least one sensor; a communication circuit; at least one processor operably coupled with the at least one sensor and the communication circuit; and at least one memory operably coupled with the at least one processor, wherein the memory may store instructions which, when executed, cause the processor to: receive a request for authenticating a user of the electronic device using a designated authentication method; identify whether a device selected as a reference device is a first device among the first device and a second device which are included in the at least one sensor and the communication circuit, and are capable of generating authentication data required for using the designated authentication method to authenticate the user; generate data, when first authentication data for authenticating the user is acquired from the first device, indicating a first time point at which the processor acquired the first authentication data; generate data, when second authentication data for authenticating the user is acquired from the second device, indicating a second time point at which the processor acquired the second authentication data; confirm, based on the first data indicating the first time point and the second data indicating the second time point, whether the second time point is within a threshold time range based on the first time point; and authenticate the user using the first authentication data and the second authentication data based on whether the second time point is within the threshold time range based on the first time point.

Method for authenticating user and electronic device assisting same

A stack package may include a first substrate package, a second substrate package, an interposer and at least one semiconductor chip. The first substrate package may include a plurality of first pads isolated from direct contact with each other by a first pitch. The second substrate package may be under the first substrate package. The second substrate package may include a plurality of second pads isolated from direct contact with each other by a second pitch. The second pitch may be different from the first pitch. The interposer may be above the first substrate package. The interposer may include a plurality of third pads isolated from direct contact with each other by a third pitch. The semiconductor chip may be arranged above the interposer.

Stack packages

Growing community of inventors

Hwaseong-si, South Korea

Jiyoung Park