Samsung Electronics Co., Ltd.

Seoul National University

Jiwoon Im

Iksoo Kim

Junwon Lee

Seunghun Hong

Jinyong Kim

Jongmyeong Lee

Sung Woo Myung

Kwangtae Hwang

Minbaek Lee

Geumbi Mun

Byungsun Park

Jiyoun Seo

Sungjin Park

Changsoo Lee

Sangho Rha

Ik Soo Kim

Won-Seok Jung

Hyunseok Lim

Hyungjoon Kim

Kyung-Tae Jang

Tae-Jong Han

Il-Woo Kim

Kwangchul Park

Myoungwoon Kim

Jongwan Choi

Yu Seon Kang

Dong Hyeop Ha

Jaechul Lee

Hee Jong Jeong

Byungho Chun

Younseok Choi

Minjae Oh

Jaewon Jung

Youngil Lee

Taeyong Eom

Je-Dong Lee

Hyukho Kwon

Younghoon Kwon

Byung-Sun Park

A semiconductor device includes a lower memory stack disposed on a substrate and including lower gate electrodes and a lower staircase structure, an upper memory stack including upper gate electrodes and an upper staircase structure, a lower interlayer insulating layer doped with an impurity and covering the lower staircase structure, the lower interlayer insulating layer having a doping concentration gradually increasing toward the lower staircase structure, an upper interlayer insulating layer doped with an impurity and covering the upper staircase structure and the lower interlayer insulating layer, the upper interlayer insulating layer having a doping concentration gradually increasing toward the upper staircase structure and the lower interlayer insulating layer, lower contact plugs and upper contact plugs contacting the lower gate electrodes and the upper gate electrodes, respectively.

Semiconductor device having doped interlayer insulating layer

A semiconductor device may comprise a stack structure on a substrate, the stack structure including a plurality of dielectric layers and a plurality of transparent conductive oxide layers, the dielectric layers and the transparent conductive oxide layers are alternately stacked, each of the dielectric layers and a corresponding one of the transparent conductive oxide layer adjacent to each other in a vertical direction have equal horizontal widths, and a channel structure extending through the stack structure, the channel structure including an information storage layer, a channel layer inside the information storage layer, and a buried dielectric layer inside the channel layer.

Semiconductor device including transparent conductive oxide layer

To manufacture an integrated circuit (IC) device, a lower structure having a step structure defining a trench is prepared. A material film is formed inside the trench. To form a material film, a first precursor including a first central element and a first ligand having a first size is supplied onto a lower structure to form a first chemisorbed layer of the first precursor on the lower structure. A second precursor including a second central element and a second ligand having a second size less than the first size is supplied onto a resultant structure including the first chemisorbed layer to form a second chemisorbed layer of the second precursor on the lower structure. A reactive gas is supplied to the first chemisorbed layer and the second chemisorbed layer.

Method of forming material film, integrated circuit device, and method of manufacturing the integrated circuit device

Provided are a radical monitoring apparatus capable of monitoring electrical diagnosis of a radical produced by direct plasma or remote plasma and the amount of change of the produced radical, and a plasma apparatus including the radical monitoring apparatus. The plasma apparatus includes a process chamber in which a plasma process is performed, a dielectric film in the process chamber and surrounding sides of a plasma discharge space in the process chamber, and a sensor inside the dielectric film and configured to monitor plasma to thereby monitor a radical generated in the plasma.

Radical monitoring apparatus and plasma apparatus including the monitoring apparatus

An electronic circuit includes a first filter and a second filter. The first filter passes a first frequency component of a first harmonic frequency generated by a first voltage source to form a potential difference in a chamber and a second frequency component of a second harmonic frequency higher than the first harmonic frequency. The second filter removes the first frequency component and the second frequency component received from the first filter. The second harmonic frequency is included in a first frequency band determined based on a capacitance of the second filter.

Electronic circuit for filtering signal received from plasma chamber

A semiconductor manufacturing apparatus includes a chamber that includes a station in which a substrate is provided, a substrate holder that is in the station and receives the substrate, and lower showerheads below the substrate holder, the lower showerheads including an isotropic showerhead having first nozzle holes that isotropically provide a first reaction gas on a bottom surface of the substrate, and a striped showerhead having striped nozzle regions and striped blank regions between the striped nozzle regions, the striped nozzle regions having second nozzle holes that non-isotropically provide a second reaction gas on the bottom surface of the substrate.

Showerhead, semiconductor manufacturing apparatus including the same, and semiconductor manufacturing method

Nonvolatile memory devices and methods of fabricating the nonvolatile memory devices are provided. The nonvolatile memory devices may include a stacked structure including a plurality of conductive films and a plurality of interlayer insulating films stacked in an alternate sequence on a substrate and a vertical channel structure extending through the stacked structure. The plurality of conductive films may include a selection line that is closest to the substrate among the plurality of conductive films. The selection line may include a lower portion and an upper portion sequentially stacked on the substrate, and a side of the upper portion of the selection line and a side of the lower portion of the selection line may have different profiles.

Nonvolatile memory devices comprising a conductive line comprising portions having different profiles and methods of fabricating the same

A method for fabricating a semiconductor device includes forming a stacked structure on a substrate, forming a first interlayer dielectric covering the stacked structure, and forming a second interlayer dielectric covering the first interlayer dielectric. The stacked structure includes a stepwise shape. The first interlayer dielectric includes at least one step portion having a slope surface connecting a first top surface to a second top surface. The first top surface and the sloped surface define a first angle that is an obtuse angle. A level of the second top surface is higher than a level of the first top surface.

Method for fabricating semiconductor device including a first ILD with sloped surface on a stacked structure and a second ILD on the first ILD

A semiconductor device and methods of manufacturing and operating the semiconductor device may be disclosed. The semiconductor device may comprise different nanostructures. The semiconductor device may have a first element formed of nanowires and a second element formed of nanoparticles. The nanowires may be ambipolar carbon nanotubes (CNTs). The first element may be a channel layer. The second element may be a charge trap layer. In this regard, the semiconductor device may be a transistor or a memory device.

Semiconductor memory devices and methods of manufacturing and operating same

Semiconductor devices and methods of manufacturing and operating same

Growing community of inventors

Hwaseong-si, South Korea

Jiwoon Im