Lsi Corporation

Verisilicon Holdings (Cayman Islands) Co. Ltd.

Jitendra Rayala

A distributed arithmetic multiply/accumulate (MAC) unit for computing inverse discrete cosine transformations (IDCTs). In one embodiment, the distributed arithmetic MAC unit includes: (1) a first pipeline stage configured to perform dot products on received sequential input data and (2) a second pipeline stage coupled to the first pipeline stage and configured to compute additions and subtractions of the dot products to yield sequential output data.

Digital signal processor having inverse discrete cosine transform engine for video decoding and partitioned distributed arithmetic multiply/accumulate unit therefor

Method and apparatus for canceling an echo path by locating an active region thereof for subsequent application of a filter thereto. A plurality of far-end signals R(n) and a corresponding plurality of near-end signals S(n) are acquired. Correlation within the far-end and near-end signals R(n) and S(n) is removed and gain control applied to bring the corresponding ones of the far-end and near-end signals R(n) and S(n) to a uniform level. The plurality of far-end and near-end signals R(n) and S(n) are then stored in respective data blocks. The stored data blocks are subsequently processed together to determine a set of coefficients for a bank of adaptive filters. An energy estimate is computed for each one of the bank of adaptive filters and the location of the active region of the echo determined from the energy estimates.

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San Jose, CA, United States of America

Jitendra Rayala