Texas Instruments Corporation

Jitender Kapil

Deep Banerjee

Srikanth Vellore Avadhanam Ramamurthy

A differential transceiver including a driver circuit and a receiver circuit, and a serial communications network including the transceiver. The receiver circuit includes an input resistor attenuator, having first and second attenuator inputs coupled to the first and second terminals, respectively, a differential comparator having first and second comparator inputs, and an output buffer having an input coupled to the output of the comparator. The receiver circuit further includes a first switch coupling the first attenuator output to the first comparator input, a second switch coupling the second attenuator output to the second comparator input, and a fail-safe circuit including first and second current sources coupled to the first and second comparator inputs, respectively, and third and fourth switches coupled in series between the first and second current sources.

Glitch reduction in high-speed differential receivers

In an example driver circuit, one of two current sources coupled between a supply voltage and one output node is disabled during a driver disable time period (tpz) while the other continues to operate during a pre-charge monopulse time period (td) within tpz. A third current source on the other side of the driver circuit and coupled to ground is also disabled during tpz. During td, the following components are enabled: a charge current source coupled between the supply voltage and a second output node; a pair of current switches respectively coupled to the output nodes; and a pair of pull-down switches respectively coupled to control terminals of the current switches. After tpz, during a compensation time period (tcomp), the current sources enabled during td are disabled and a compensation current source is enabled. After tcomp, the compensation current source is disabled.

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Jitender Kapil