Samsung Electronics Co., Ltd.

Jisoon Park

Byung Lyul Park

Ho-jin Lee

Ju-Il Choi

Kwangjin Moon

Jeonggi Jin

Jin Ho An

Siyoung Choi

Gilheyun Choi

Jumyong Park

Kyu-ha Lee

Hyungjun Jeon

Sukchul Bang

Deokyoung Jung

Kunsang Park

Yi Koan Hong

Byunglyul Park

Jinho An

Sukyoung Kim

Various embodiments of the present invention relate to a method for controlling a network access right for an application in an electronic device, and an electronic device for operating same. A control method for an electronic device comprises the steps of: receiving an input of a command for switching a mode of an electronic device to a blocking mode; and when a command for switching to the blocking mode is input, blocking a network access right of at least one application which has been preselected by a user from among a plurality of applications in the electronic device.

Technology and method for selectively providing network function to application of device

Provided herein are semiconductor devices with through electrodes and methods of fabricating the same. The methods may include providing a semiconductor substrate having top and bottom surfaces facing each other, forming on the top surface of the semiconductor substrate a main via having a hollow cylindrical structure and a metal line connected to the main via, forming an interlayered insulating layer on the top surface of the semiconductor substrate to cover the main via and the metal line, removing a portion of the semiconductor substrate to form a via hole exposing a portion of a bottom surface of the main via, and forming in the via hole a through electrode that is electrically connected to the main via. The bottom surface of the main via is overlapped by a circumference of the via hole, when viewed in a plan view.

Semiconductor devices with through electrodes and methods of fabricating the same

Semiconductor devices are provided. The semiconductor devices include a substrate, a first interlayer insulating layer disposed on a front-side of the substrate, a TSV structure passing through the first interlayer insulating layer and the substrate. The TSV structure has a bottom end protruding from a back-side of the substrate, a back-side insulating layer and a back-side passivation layer disposed on the back-side of the substrate, and a bumping pad buried in the back-side insulating layer and the back-side passivation layer and disposed on the bottom end of the TSV structure. The bottom end of the TSV structure protrudes into the back-side bumping pad, and top surfaces of the back-side passivation layer and the back-side bumping pad are coplanar.

Semiconductor devices having a TSV, a front-side bumping pad, and a back-side bumping pad

Semiconductor devices having through electrodes capped with self-aligned protection layers. The semiconductor device comprises a semiconductor substrate including an integrated circuit formed therein, an interlayer dielectric layer on the semiconductor substrate to cover the integrated circuit, an intermetal dielectric layer having at least one metal line that is provided on the interlayer dielectric layer and is electrically connected to integrated circuit, and a through electrode that vertically penetrates the interlayer dielectric layer and the semiconductor substrate. The through electrode includes a top portion that is capped with a first protection layer capable of preventing a constituent of the through electrode from being diffused away from the through electrode.

Semiconductor devices having through electrodes capped with self-aligned protection layers

Methods for fabricating semiconductor devices having through electrodes are provided. The method may comprise forming a via hole which opens towards an upper surface of a substrate and disconnects with a lower surface of the substrate; forming a via isolation layer which extends along an inner surface of the via hole and covers the upper surface of the substrate; forming a seed layer on the via isolation layer which extends along the via isolation layer; annealing the seed layer in-situ after forming the seed layer; forming a conductive layer, filling the via hole, by an electroplating using the seed layer; and planarizing the upper surface of the substrate to form a through electrode surrounded by the via isolation layer in the via hole.

Methods for fabricating semiconductor devices having through electrodes

Embodiments of the present inventive concepts provide a wafer loader having one or more buffer zones to prevent damage to a wafer loaded in the wafer loader. The wafer loader may include a plurality of loading sections that protrude from a main body and are configured to be arranged at various locations along an edge of the wafer. Each of the loading sections may include a groove into which the edge of the wafer may be inserted. The loading section may include first and second protrusions having first and second inner sides, respectively, that face each other to define the groove therebetween. At least one of the first and second inner sides may include a recess to define the buffer zone.

Wafer loaders having buffer zones

Provided are a carrier and a method of fabricating a semiconductor device using the same. The carrier may include a recess region provided adjacent to an edge thereof. The recess region may be configured to confine an adhesive layer within a desired region including the recess region. The recess region makes it possible to reduce a process failure in a process of fabricating a semiconductor device.

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Suwon-si, South Korea

Jisoon Park