Samsung Electronics Co., Ltd.

Yonsei University

Lg Chem, Ltd

Amkor Technology, Inc.

Intellectual Discovery Co., Ltd.

Jinyoung Kim

Sehwan Park

Youngdeok Seo

Ilhan Park

Dongmin Shin

Sangwan Nam

Hyun Seok Seo

Joonsuc Jang

Heegeun Jeong

Wandong Kim

Kyoman Kang

Jisang Lee

Jeong-Ho Lee

Makoto Hirano

Jaeduk Yu

Woohyun Kang

Seungjae Lee

Sanghyun Choi

Jinwan An

Jongchul Park

Jongmin Baek

Min Woo Lee

Haksoo Han

Jinuk Kwon

Taehun Lee

Chongkwang Chang

Sungmin Joe

Kwansik Cho

Euiyeol Kim

Youngwoo Chung

Kwangyoung Oh

Jongkwang Jung

Hyounmin Baek

Donghoon Khang

Min Gon Lee

Heewon Lee

Kangho Roh

Youngki Jung

Junho Kim

Seoyoung Lee

Sungkyu Kim

Taehui Na

Min Ji Lee

Changjoon Lee

Beomsuk Lee

Yonggil Han

Doowon Kwon

Ho-chul Ji

Junho Shin

Jongsung Lee

Seungjoo Nah

Jongryul Kim

Seungwan Woo

Haeil Lee

YoonJoo Kim

Noma Kim

Sangsup Jeong

Seongho Son

Seokjin Kwon

Eunhyang Park

Yunjeong Choi

Jameyung Kim

Romi Lee

Younghwi Yang

Shinho Oh

Kyeongjae Byeon

Mangeun Cho

Daun Jung

JongSik Paek

JinHan Kim

SeWoong Cha

JaeHun Bae

DongJin Kim

DooHyun Park

Changbin Cho

Okseon Yoon

Hanki Yoon

Soonkyu Lee

Hyojung Jang

Jihee Yang

Heetai Oh

Silwan Chang

Dongchul Lee

Hochul Ji

Jiyeong Kim

Myeongsoo Kim

Gunhwi Kim

Daero Lee

In Ho Ro

Sungki Min

Sangmi Lee

Youkreol Na

A semiconductor package includes a first semiconductor chip on a lower structure. A first underfill is between the first semiconductor chip and the lower structure. The first underfill includes a first portion adjacent to a center region of the first semiconductor chip, and a second portion adjacent to an edge region of the first semiconductor chip. The second portion has a higher degree of cure than the first portion. A plurality of inner connection terminals is between the first semiconductor chip and the lower structure. The plurality of inner connection terminals extends in the first underfill.

Semiconductor package including underfill and method of forming the same

An image sensor includes: a semiconductor substrate having a first side and a second side opposite to each other; a plurality of photoelectric regions arranged in the semiconductor substrate in a first direction and a second direction, perpendicular to each other, in a first region of the semiconductor substrate; and a first separation structure disposed between the plurality of photoelectric regions in the first region of the semiconductor substrate. The first separation structure includes a lower separation structure and an upper separation structure disposed above the lower separation structure, and the first separation structure includes a linear portion located between the plurality of photoelectric regions and extending in the first direction, wherein, in a cross-sectional structure of the linear portion of the first separation structure in the first direction, at least one of an upper surface of the lower separation structure and a lower surface of the upper separation structure has a wavy shape.

Image sensor

A memory device may include a memory block and a control circuit. The memory block may include a first sub-block and a second sub-block that are connected between a common source line and a plurality of bit lines and may be vertically stacked. The control circuit may be configured to select any one of the common source line and the plurality of bit lines as a transmission path of an erase voltage based on positions of the first sub-block and the second sub-block, and perform erase operations on the first sub-block and the second sub-block in units of sub-blocks.

Memory device that performs erase operation to preserve data reliability

An electronic device is provided. The electronic device includes a plurality of audio output devices and at least one processor operatively connected to the plurality of audio output devices, wherein the at least one processor may be configured to identify orientation information of the electronic device, based on detecting an output of audio data, transmit, to each audio output device, channel information of audio data to be output by each of the plurality of audio output devices, based on the orientation information of the electronic device, and control the plurality of audio output devices so that each audio output device selects a channel and outputs audio data of the selected channel, based on the channel information.

Electronic device and multichannel audio output method using same

An image sensor includes a semiconductor substrate having first and second opposing surfaces thereon and a photoelectric conversion region of first conductivity type therein, which extends between the first and second surfaces. A two-dimensional array of semiconductor photoelectric conversion devices of second conductivity type is provided within the photoelectric conversion region. A first grid-shaped isolation region is provided, which extends into the photoelectric conversion region from the first surface, and has a first electrically conductive material therein. A second grid-shaped isolation region is provided, which extends into the photoelectric conversion region from the second surface. An electrically conductive contact region is provided, which (i) extends on the second surface and into a portion of the photoelectric conversion region that is outside the two-dimensional array of semiconductor photoelectric conversion devices, and (ii) electrically contacts a portion of the first electrically conductive material within the first grid-shaped isolation region.

Image sensors having dual-surface isolation regions and deep through-substrate contacts and methods of forming same

An image sensor includes; a substrate having a first surface and an opposing second surface and including unit pixels respectively having photoelectric conversion regions, a semiconductor pattern disposed in a first trench defining the unit pixels, the semiconductor pattern including a first semiconductor layer provided on an inner surface of the first trench and a second semiconductor layer provided on the first semiconductor layer, and a first contact provided on the second surface and connected to the semiconductor pattern. A height of the first semiconductor layer from a bottom surface of the first trench is less than a height of the second semiconductor layer from the bottom surface of the first trench.

Image sensor and method of fabricating same

An image sensor includes a substrate including a first region and a second region surrounding the first region, a light sensing element in the substrate, a planarization layer on the light sensing element, a color filter array layer including color filters on the planarization layer on the first region of the substrate, a light blocking metal pattern on the planarization layer on the second region of the substrate, a dummy color filter layer on the light blocking metal pattern on a portion of the second region adjacent to the first region of the substrate, and microlens on the color filter array layer. Active pixels are in the first region, and optical black (OB) pixels are in the second region.

Image sensor and method of manufacturing the same

An image sensor includes a substrate having first and second surfaces. A separation structure penetrates the substrate. Photoelectric conversion device regions are spaced apart from each other in the substrate. Color filters are disposed on the second surface of the substrate. Microlenses are disposed on the color filters. The separation structure includes lower and upper separation patterns, first line portions that run parallel to each other, and second line portions that perpendicularly intersect the first line portions. An upper surface of the lower separation pattern or a lower surface of the upper separation pattern has a wavy or sawtooth shape. In intersecting regions in which the first line portions and the second line portions intersect, a vertical length of one of the lower separation pattern and the upper separation pattern is about 2 to 10 times greater than a vertical length of the other.

Image sensor including separation structure

A display panel in which a resistance structure is provided on a test pattern to prevent a circuit of the display panel from being damaged by static electricity introduced into the test pattern, and a display apparatus having the same are provided. The display panel includes: a substrate; a plurality of pixel circuits provided on the substrate and configured to drive a plurality of inorganic light emitting devices; a test line provided on the substrate and extending from an edge of the substrate; an insulating layer provided on the test line; and a resistance structure provided on the test line, the resistance structure including: at least two vertical interconnect accesses (vias) passing through the insulating layer, and a resistance layer provided on the insulating layer and extending between the at least two vias, wherein the at least two vias connect the test line and the resistance layer to each other, and the test line is discontinuous at an area between the at least two vias, and wherein the resistance layer is configured to receive, through one of the at least two vias, a current applied to the test line.

Display panel and display apparatus having the same

An image sensor includes a semiconductor substrate having a first surface and a second surface. The first surface includes an element isolation trench. An element isolation layer is arranged inside the element isolation trench. The element isolation layer defines an active region. A gate electrode is arranged on the first surface of the semiconductor substrate. An interlayer insulating layer is arranged on the first surface of the semiconductor substrate and covers the gate electrode. A ground contact is configured to penetrate the element isolation layer and the interlayer insulating layer and contacts the semiconductor substrate. A color filter is arranged on the second surface of the semiconductor substrate.

An operating method of a nonvolatile memory device for programming multi-page data, the operating method including: receiving the multi-page data from a memory controller; programming first page data among the multi-page data to first memory cells connected to a word line adjacent to a selected word line; reading previous page data previously stored in second memory cells connected to the selected word line based on a first sensing value and a second sensing value after programming the first page data; calculating a first fail bit number by comparing first bits of the previous page data read based on the first sensing value to second bits of the previous page data read based on the second sensing value; and programming the previous page data read from the second memory cells and second page data among the multi-page data to the second memory cells based on the first fail bit number.

Operating method of a nonvolatile memory device for programming multi-page data

Aggressor memory cells connected to one or more aggressor wordlines are grouped into aggressor cell groups by performing a read operation with respect to the aggressor wordlines based on one or more grouping read voltages, where the aggressor wordlines are adjacent to a selected wordline corresponding to a read address among wordlines of a memory block. Selected memory cells connected to the selected wordline are grouped into a selected cell groups respectively corresponding to the aggressor cell groups. Group read conditions respectively corresponding to the selected cell groups are determined and group read operations are performed with respect to the plurality of selected cell groups based on the group read conditions. The read errors are reduced by grouping the selected memory cells into the selected cell groups according to the change of operation environments.

Nonvolatile memory device and method of operating the same

A non-volatile memory device includes a memory cell array including a plurality of memory blocks that includes a plurality of memory cells connected to a plurality of word lines and a plurality of bit lines, a row decoder configured to select one among the plurality of memory blocks, based on an address, a voltage generator configured to apply word line voltages corresponding to selected word lines and unselected word lines, among the plurality of word lines, page buffers connected to the plurality of bit lines and configured to read data from a memory cell connected to one among the selected word lines of the selected one among the plurality of memory blocks, and a control logic configured to control the row decoder, the voltage generator, and the page buffers.

Non-volatile memory device, operating method thereof, controller for controlling the same, and storage device having the same

A controller including a non-volatile memory interface circuit connected to at least one non-volatile memory device and configured to control the at least one non-volatile memory device; an error correction circuit configured to perform an error correction operation on a codeword received from the non-volatile memory interface circuit according to an error correction decoding level from among a plurality of error correction decoding levels, wherein the non-volatile memory interface circuit is further configured to: receive side information from the at least one non-volatile memory device; predict a distribution of memory cells based on the side information; and select the error correction decoding level from among the plurality of error correction decoding levels according to the predicted distribution.

Non-volatile memory device, controller for controlling the same, storage device having the same, and reading method thereof

In a method of reading data in a nonvolatile memory device including a plurality of memory cells having a plurality of states including a first state and a second state, a first read operation for the first state is performed, and a second read operation for the second state is performed. To perform the first read operation, cell counts for a valley of the first state are obtained by performing a valley cell count operation for the first state, a first read voltage level for the first state is determined based on the cell counts and at least one first reference parameter for the first state, and a first sensing operation for the first state is performed by using the first read voltage level. To perform the second read operation, a second read voltage level for the second state is determined based on the cell counts and at least one second reference parameter for the second state, and a second sensing operation for the second state is performed by using the second read voltage level.

Method and device for reading data in a nonvolatile memory device based on cell counts of two states

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Seoul, South Korea

Jinyoung Kim