Mosel Vitelic Corporation

Hyundai Electronics America, Inc.

Jinyong Chung

Li-Chun Li

Michael A Murray

Jong-Hoon Oh

Pochung Young

Joon-Ho Kim

A circuit for generating a voltage for pre-charging a data line. The circuit receives as input an ON/OFF signal which is typically the data bus line equalization control signal. The circuit also receives a varying power voltage. The circuit includes a bleeder which biases the data line at a voltage differing from said varying power voltage by a constant amount when the circuit is ON. The circuit consumes substantially zero power when OFF.

Data line bias circuit

A hierarchical word line driving structure is disclosed that uses a single global word line and low power sub-word line driver circuits that are relatively small in size. Higher density memory cell arrays are made possible by inverting the signal on a global word line inside each sub-word line driver circuit.

Word line driver for semiconductor memories

A serial address generator for a sequential (burst mode) random access memory generates a sequence of internally generated addresses for fast cycling. The start address is externally provided. Then, as the clock signals arrive, the subsequent addresses are generated in sequence by the address sequencer. The address sequencer is preset to the second address in the sequence following the start address. Simultaneously, the start address is connected by an external address enable switch to an output terminal of the address generator, bypassing the address sequencer. When the first clock signal arrives at the address sequencer, the address sequencer output is sampled by closing an internal address enable switch and opening the external address enable switch. Thus the internally generated addresses are provided immediately following the start address. The address sequencer thereby generates each address one clock cycle ahead of that in the prior art, and the output address is provided one half clock cycle ahead of that in the prior art.

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Los Altos Hills, CA, United States of America

Jinyong Chung