Samsung Electronics Co., Ltd.

Yonsei University

Jinwoo Choi

Youngwoo Park

Seunghoon Lee

Dohyun Kim

Tae-Yeol Kim

Gyosoo Choo

Seong Jun Yun

Geun Hee Jeong

Eui-young Chung

Yeri Heo

Cheongwon Lee

A memory system and an electronic system including the same are provided. The memory system includes a memory device configured to receive data, and a hot page logic configured to receive an address for the data, determine that the address is for a hot page based on an input frequency and an input order of the address, and create hot page information including the address that was determined as associated with the hot page such that a page migration operation of the data is performed.

Memory system with hot page logic, an electronic system including the same memory system and a method of operating the same electronic system

An embodiment provides a test element group (TEG) circuit, including: a first pad configured for a test voltage to be applied; an amplifier including a first input terminal connected to the first pad, a second input terminal connected to a first terminal of a test transistor, and an output terminal electrically connected to the second input terminal; a variable resistor including one terminal connected to the output terminal of the amplifier and the other terminal connected to the first terminal of the test transistor; and a gate driving circuit that supplies a gate voltage to a gate of the test transistor.

TEG circuit, semiconductor device, and test method of the TEG circuit

Provided are semiconductor devices and methods for fabricating the same. A method for fabricating a semiconductor device includes: forming an interlayer dielectric layer including an opening in which a lower conductive layer is exposed; forming a barrier layer on the interlayer dielectric layer and on the lower conductive layer the opening; forming an anti-seed generation region on a surface of the barrier layer which is provided on a top surface of the interlayer dielectric layer and an upper sidewall of the opening; and filling the opening with conductive material to form a conductive layer.

Methods for fabricating semiconductor devices including a seed generation accelerating layer

Growing community of inventors

Hwaseong-si, South Korea

Jinwoo Choi