Silicon Laboratories Inc.

Jinwen Xiao

Axel Thomsen

Ka Yin Leung

Pavel Konecny

Xiaodong Wang

John M Khoury

Clayton H Daigle

Timothy Joseph Dupuis

Jeffrey Lee Sonntag

Alan Lee Westwick

Douglas R Holberg

Shahram Tadayon

Kenneth Wilson Fernald

Kafai Leung

Dazhi Wei

Scott Willingham

Paul Zavalney

Shouli Yan

Praveen Kallam

Gang Yuan

Brent Wilson

Subrata Roy

Kenneth Alan Berringer

Imranul Islam

Erik Pankratz

Pedro Pachuca

A calibration current load is selectively coupled to an output of a pulse frequency modulated (PFM) DC-DC converter during a calibration operation to increase charge supplied from a battery supplying an input voltage to the converter. A voltage across a sense resistor in series with the battery is integrated during a measurement interval while the calibration current load is coupled to the output. A charge drawn per pulse from the battery is determined based on the sense resistor, the integrated voltage and the number of pulses during the measurement interval. Alternatively, a first PFM frequency is determined with a first calibration current load coupled to the converter output. A second PFM frequency is determined with a second calibration current load. The charge drawn per pulse from the battery is determined based on the first and second PFM frequencies and the first and second calibration current loads.

Charge measurement calibration in a system using a pulse frequency modulated DC-DC converter

The charge drawn from a battery during each switching event (pulse) of a pulse frequency modulated DC-DC converter is determined during a calibration period. based on differences in pulse rate with different current loading. Another approach calibration approach determines charge drawn from the battery by measuring voltage across a sense resistor while measuring the total pulse rate and while adding sufficient load current to ensure that the voltage is much larger than the residual offset of the measurement system. During operation, the system counts number of pulses are counted and the total charge drawn from the battery is determined based, at least in part, on the charge transferred per pulse during calibration, the operational mode, the battery voltage during calibration and operationally and the output voltage. Based on the total charge drawn and temperature (for temperature dependent battery types), the battery state of charge is estimated.

Charge measurement in a system using a pulse frequency modulated DC-DC converter

In one embodiment, an apparatus includes a controller to control a voltage regulator. The controller may have a first comparator circuit to compare a first reference voltage to a feedback voltage. In turn, the first comparator circuit may include: a first comparator having a first input terminal to receive the feedback voltage and a second input terminal to receive the reference voltage and an output node to output an error signal based on the comparison; and a first pre-charge circuit coupled between the first input terminal and the output node configured to pre-charge a first portion of a compensation network to a pre-charge level. The first controller may further include a second comparator circuit coupled to the first comparator circuit compare the error signal to a ramp signal and to generate a first control output to control a power train of the voltage regulator in a first mode of operation.

Pre-charge technique for a voltage regulator

An integrated circuit (IC) includes a plurality of pads adapted to send or receive signals, and a plurality of mixed signal interface blocks, each of which is coupled to a corresponding pad in the plurality of pads. Furthermore, each mixed signal interface block in the plurality of mixed signal interface blocks is adapted to be configurable to provide selected functionality independently of the other mixed signal interface blocks.

Apparatus for mixed signal interface circuitry and associated methods

A motor control apparatus to control a motor external to the motor control apparatus includes a microcontroller unit (MCU). The MCU includes mixed signal motor control circuitry adapted to perform back electromotive force (EMF) motor control in a first mode of operation. The mixed signal motor control circuitry is further adapted to perform field oriented control (FOC) in a second mode of operation.

Apparatus for motor control system and associated methods

A circuit includes a comparator including a first input, a second input, and an output. The circuit further includes a plurality of capacitive sampling circuits configured to be selectively coupled to the first and second inputs. Each of the plurality of capacitive sampling circuits includes first and second capacitors, and includes first and second conversion switches configured to selectively couple the first and second capacitors to the first and second inputs, respectively. The first and second conversion switches of a selected one of the plurality of capacitive sampling circuits are closed to couple the selected one to the first and second inputs of the comparator during a conversion phase.

Successive approximation register analog-to-digital converter with multiple capacitive sampling circuits and method

Techniques are disclosed relating to supplying a power supply voltage to a gate driver. In one embodiment, an apparatus is disclosed that includes a first transistor configured to raise a voltage at a node and a second transistor configured to lower the voltage at the node. The apparatus further includes a first driver configured to receive a first power supply voltage, and to use the first power supply voltage to control a gate voltage of the first transistor. The apparatus further includes a second driver configured to receive a second power supply voltage, and to use the second power supply voltage to control a gate voltage of the second transistor. In such an embodiment, the apparatus includes a first regulator coupled to the first driver and configured to generate the first power supply voltage based on the second power supply voltage.

Boot-strap regulator for gate driver

An integrated circuit (IC) includes a plurality of pads adapted to communicate signals with a circuit external to the IC, and a first mixed signal interface block coupled to a first pad in the plurality of pads, where the first mixed signal interface block is adapted to receive a first trigger signal from the circuit external to the IC and to provide a second trigger signal. The IC further includes a second mixed signal interface block coupled to a second pad in the plurality of pads, where the second mixed signal interface block is adapted to receive and track a first input signal from the circuit external to the IC in a first mode of operation of the IC. The second mixed signal interface block is further adapted to generate, in response to the second trigger signal, a first output signal based on the first input signal and to provide the first output signal to a digital core of the IC in a second mode of operation of the IC, where the power consumption of the IC is lower in the first mode of operation than in the second mode of operation.

Apparatus for mixed signal interface acquisition circuitry and associated methods

An input digital signal is converted to an analog signal using a main digital to analog converter (DAC) and a sub DAC. An offset value is subtracted from the input digital signal to generate an offset adjusted digital signal. The main DAC converts the offset adjusted digital signal to a first analog signal. A second digital signal is generated based on the offset value and a correction factor determined, at least in part, during calibration of the main DAC. The sub DAC converts the second digital to a second analog signal, which when combined with the first analog signal, provides an analog representation of the input digital signal.

Digital to analog converter

Techniques are disclosed relating to charging and discharging gates of transistors. In one embodiment, an apparatus includes first and second drivers. The first driver is configured to discharge a gate of a first transistor, and to send a charge indication to the second driver in response to reaching a Miller plateau for the first transistor. The second driver is configured to charge a gate of a second transistor above a threshold voltage in response to receiving the charge indication. In some embodiments, the second driver is configured to begin charging the gate of the second transistor to a voltage below the threshold voltage when the first driver begins discharging the gate of the first transistor begins, and to wait to charge the gate of the second transistor above the threshold voltage until the charge indication has been received.

Amplifier using master-slave control scheme

Techniques are disclosed relating to charging and discharging a gate of transistor. In one embodiment, an apparatus is disclosed that includes a driver configured to discharge a gate of a transistor. The driver is configured to discharge the gate at a first rate until reaching a Miller plateau for the transistor, and to discharge the gate at a second rate after reaching the Miller plateau. In such an embodiment, the first rate is greater than the second rate. In some embodiments, the driver is also configured to charge the gate of the transistor at a third rate until reaching a Miller plateau for the transistor, and to charge the gate at a fourth rate after reaching the Miller plateau, the third rate being greater than the fourth rate. In some embodiments, the apparatus is a class D amplifier.

Amplifier using fast discharging reference

A DC-DC digital pulse width modulated power supply is disclosed for generating a DC regulated output voltage. A digital control node has a digital control voltage disposed thereon for controlling the operation of the supply, wherein the digital control voltage has a substantially zero voltage when the output voltage of the supply is at a desired regulation, the digital control voltage having a resolution defined by a least significant bit (LSB). An input node receives a DC analog reference voltage defining the output voltage of the supply. A difference device determines the difference between the analog reference voltage and the output voltage to generate said digital control voltage. An LSB variation device varies the size of the LSB without varying the value of the digital control voltage for a substantially zero difference between the analog reference voltage and the output voltage.

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Austin, TX, United States of America

Jinwen Xiao