Chinese Academy of Sciences

Jinshun Bi

Zhengsheng Han

Jiajun Luo

Ming Liu

Jing Liu

Tianchun Ye

Kun Zhang

Haitao Sun

Jianhui Bu

Yinxue Lv

Yuanlu Xie

An apparatus and a method for configuring or updating a programmable logic device are provided. The apparatus includes a control module and a storage module connected to the control module. The control module includes: a JTAG interface for connecting the control module to a JTAG host, and a configuration interface compatible with a to-be-configured programmable logic device. The control module is configured to: after receiving a first control instruction including configuration information via the JTAG interface, store the configuration information into the storage module; and after receiving a configuration instruction, read the configuration information to configure the to-be-configured programmable logic device. A configuration clock used in a process that the control module configures the to-be-configured programmable logic device is generated from the to-be-configured programmable logic device, the control module or an external clock source.

Apparatus and method for configuring or updating programmable logic device

The present invention provides a SOI MOS device modeling method. The SOI MOS device is one having a source-drain injection not reaching the bottom. The method comprises: a) establishing an overall model comprising a primary MOS device model simulating an SOI MOS device having the source-drain injection reaching the bottom, a source body PN junction bottom capacitance model simulating a source body PN junction bottom capacitance, and a drain body PN junction bottom capacitance model simulating a drain body PN junction bottom capacitance; and b) extracting parameters respectively for the primary MOS device model, the source body PN junction bottom capacitance model, and the drain body PN junction bottom capacitance model in the overall model. In the prior art, the source body junction bottom capacitance and the drain body junction bottom capacitance in the SOI MOS device having a source-drain injection not reaching the bottom affect the performances of the device. The modeling method of the present invention takes the effect into consideration, improves model precision, and can be effectively used for the simulation design of a device.

SOI MOS device modeling method

A method for improving anti-radiation performance of SOI structure that includes implementing particle implantations of high-energy neutrons, protons and &#x3b3;-rays to a buried oxide layer of an SOI structure, and then performing annealing process. The high-energy particle implantation introduces displacement damage to the buried oxide layer of the SOI structure.

Method for improving anti-radiation performance of SOI structure

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Beijing, China

Jinshun Bi