Samsung Electronics Co., Ltd.

Jinshi Zhao

Minyoung Park

Ingyu Baek

Hongsik Yoon

Hyunjun Sim

In-gyu Baek

Eun-Kyung Yim

Han-Sin Lee

Hong Sik Yoon

Hyun Jun Sim

Hyun-Jun Shim

A semiconductor memory device includes a first conductive line, a second conductive line crossing over the first conductive line, a resistance variation part disposed at a position in which the second conductive line intersects with the first conductive line and electrically connected to the first conductive line and the second conductive line and a mechanical switch disposed between the resistance variation part and the second conductive line. The mechanical switch includes a nanotube.

Semiconductor memory device

A nonvolatile memory device includes resistive memory devices in a three-dimensional structure. A block select circuit generates a block select signal for selecting a memory block. In response to the block select signal, local word line selection units connected to each memory block connect global word lines connected to a word line decoder and local word lines, and local bit line selection units connected to each memory block connect global bit lines connected to a sense amplifier and local bit lines. Each memory block includes local word lines which extend in a first direction and are stacked in a second direction perpendicular to the first direction on a second plane perpendicular to a first plane. Local bit lines extend in the second direction to cross local word lines. Memory cells are formed at cross-points where local word lines and local bit lines cross one another.

Nonvolatile memory device

Provided is a semiconductor memory device. The semiconductor memory device may include a local bitline extending in a direction substantially vertical to an upper surface of a semiconductor substrate and a local wordline intersecting the local bitline. The local bitline is electrically connected to a bitline channel pillar penetrating a gate of a bitline transistor, and the local wordline is electrically connected to a wordline channel pillar penetrating a gate of a wordline transistor.

A resistive memory device includes a first electrode, a resistive oxidation structure and a second electrode. The resistive oxidation structure has sets of oxidation layers stacked on the first electrode. Each set is made up of a first metal oxide layer and a second metal oxide layer which is disposed on and is thinner than the first metal oxide layer. The first metal oxidation layer of the first one of the sets of oxidation layers contacts an upper surface of the first electrode. The second electrode is formed on the resistive oxidation structure. The resistance of the oxidation structure can be changed by an electric field.

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Seoul, South Korea

Jinshi Zhao