Freescale Semiconductor,inc.

Jinsheng Wang

Huan Wang

Meiquan Huang

Zhiwei Gong

Zhijie Wang

Wei Gao

Dehong Ye

Yanbo Xu

Lei Wang

Fei Zong

Jianshe Bi

Liping Guo

Naikou Zhou

Naikuo Zhou

Nageswara Rao Bonda

A packaged integrated circuit device includes a substrate module, leads, an IC die having first and second sets of die contact pads, and an encapsulant. The substrate module has upper and lower sets of conductive contacts on its upper and lower surfaces, respectively. The upper set of conductive contacts is electrically connected to the lower set of conductive contacts. The first set of die contact pads is electrically connected to the upper set of conductive contacts. The second set of die contact pads is electrically connected to the leads. Certain embodiments are a multi-form packaged device having both leads and conductive balls supporting different types of external connections, such as BGA and QFN.

Integrated circuit package having side and bottom contact pads

A semiconductor device is assembled from a lead frame. The device has a semiconductor die mounted on a flag of the lead frame. A mold compound forms a housing that covers the die. Lead fingers surround the die. Each lead finger has an inner lead length that is covered by the housing and an outer lead length that protrudes from the housing. The inner lead length extends from an edge of the housing towards the die. The inner lead length has an intermediate region that has been bent to form a notch. Bond wires electrically connect electrodes of the die to respective inner lead lengths.

Semiconductor device having lead frame with notched inner leads

A semiconductor device has a die support and external leads formed integrally from a single sheet of electrically conductive material. A die mounting substrate is mounted on the die support, with bonding pads coupled to respective external connection pads on an external connector side of the substrate. A die is attached to the die mounting substrate with die connection pads. Bond wires selectively electrically couple the die connection pads to the external leads and the bonding pads and electrically conductive external protrusions are mounted to the external connection pads. An encapsulant covers the die and bond wires. The external protrusions are located at a central region of a surface mounting side of the package and the external leads project outwardly from locations near the die support towards peripheral edges of the package.

Semiconductor device and method of assembling same

A method and apparatus are described for fabricating a low-pin-count chip package () including a die pad () for receiving an integrated circuit device and a plurality of connection leads () having recessed lead ends () at the outer peripheral region of each contact lead. After forming the package body () over the integrated circuit device, unplated portions () of the exposed bottom surface of the selectively plated lead frame are partially etched to form recessed lead ends () at the outer peripheral region of each contact lead, and the recessed lead ends are subsequently re-plated () to provide wettable recessed lead ends at the outer peripheral region of each contact lead.

Packaging process to create wettable lead flank during board assembly

Growing community of inventors

Tianjin, China

Jinsheng Wang