Samsung Electronics Co., Ltd.

Cornell University

University of Chicago

Sungkyunkwan University

Harvard College

Jinseong Heo

Sanghyun Jo

Yunseong Lee

Sangwook Kim

Seongjun Park

Kiyoung Lee

Taehwan Moon

Jaeho Lee

Seunggeol Nam

Eunkyu Lee

Hyeonjin Shin

Hyangsook Lee

Dukhyun Choe

Sangyeob Lee

Hagyoul Bae

Keunwook Shin

Minhyun Lee

Kwanghee Lee

Junghwa Kim

Eunha Lee

Dongwook Lee

Jiwoong Park

Saien Xie

Haeryong Kim

Changwon Lee

Jisoo Kyoung

Heejeong Jeong

Woojong Yu

Yongseon Shin

Taeho Kim

Yeonchoo Cho

Changhyun Kim

Hongkun Park

Donhee Ham

HyunJae Lee

Philip Kim

Hyunjae Lee

Provided are a ferroelectric material and an electronic device including same, the ferroelectric material including: a first domain including a first polarization layer which is polarized in a first direction and a first spacer layer disposed adjacent to the first polarization layer; a second domain including a second polarization layer which is polarized in a second direction distinct from the first direction and a second spacer layer disposed adjacent to the second polarization layer; and a structural layer, which is disposed at a domain wall between the first domain and the second domain, and belongs to/has atoms arranged according to a Pbcn space group.

Ferroelectric material, and electronic device including the same

Disclosed herein is a thin film structure, including a first conductive layer on a dielectric layer including a plurality of layers. Each of the plurality of layers includes a dopant layer containing a dopant A and a HfOlayer to form a compound of HfAO(0<x<1, z is a real number). An uppermost layer of the plurality of layers is thickest among the plurality of layers. The first conductive layer contacts the uppermost layer.

Thin film structure and electronic device including the same

A capacitor device and a semiconductor device including the capacitor device are provided. The capacitor device includes first and second electrodes spaced apart from each other, and a dielectric layer provided between the first electrode and the second electrode. The dielectric layer includes a dielectric material in which ferroelectrics and antiferroelectrics are mixed with each other.

Capacitor device and semiconductor device including the same

A semiconductor device includes: a first source/drain region; a second source/drain region; a channel between the first source/drain region and the second source/drain region; an interfacial insulating layer on the channel; a ferroelectric layer on the interfacial insulating layer; and a gate electrode on the ferroelectric layer, wherein, when a numerical value of dielectric constant of the interfacial insulating layer is K and a numerical value of remnant polarization of the ferroelectric layer is Pr, a material of the interfacial insulating layer and a material of the ferroelectric layer are selected so that K/Pr is 1 or more.

Semiconductor device and electronic apparatus including the semiconductor device

A thin film structure includes a substrate; and a material layer having a fluorite structure, the material layer on the substrate and comprising crystals of which <112> crystal orientation is aligned in a normal direction of the substrate. The material layer may have ferroelectricity. The material layer may include the crystals of which the <112> crystal orientation is aligned in the normal direction of the substrate among all crystals of the material layer in a dominant ratio.

Thin film structure and semiconductor device comprising the same

Disclosed are a thin film structure and an electronic device including the same. The disclosed thin film structure includes a dielectric material layer between a first material layer and a second material layer. The dielectric material layer includes a dopant in a matrix material having a fluorite structure. The dielectric material layer is uniformly doped with a low concentration of the dopant, and has ferroelectricity.

Thin film structure including dielectric material layer and electronic device employing the same

An integrated circuit includes transistors respectively including channel layers in a substrate, source electrodes and drain electrodes respectively contacting both sides of the channel layers, gate electrodes on the channel layers, and ferroelectrics layers between the channel layers and the gate electrodes. Electrical characteristics of the ferroelectrics layers of at least two of the transistors are different. Accordingly, threshold voltages of the transistors are different from each other.

Integrated circuit including transistors and a method of manufacturing the same

Provided is a ferroelectric thin-film structure including a semiconductor substrate, a first ferroelectric layer on the semiconductor substrate, and a second ferroelectric layer on the semiconductor substrate. The second ferroelectric layer is spaced apart from the first ferroelectric layer and has a different dielectric constant from the first ferroelectric layer. The first ferroelectric layer and the second ferroelectric layer may be different from each other in terms of the amount of a dopant contained therein, and may exhibit different threshold voltages when applied to transistors.

Ferroelectric thin-film structure and electronic device including the same

Provided are a thin film structure, a semiconductor device including the thin film structure, and a semiconductor apparatus including the semiconductor device. The thin film structure includes a substrate, and a ferroelectric layer on the substrate. The ferroelectric layer includes a compound having fluorite structure, in which a <001> crystal direction is aligned in a normal direction of a substrate, and having an orthorhombic phase and including fluorine. The ferroelectric layer may have ferroelectricity.

Thin film structure, semiconductor device including the same, and semiconductor apparatus including semiconductor device

Provided are an electronic device and a method of manufacturing the same. The electronic device includes a ferroelectric crystallization layer between a substrate and a gate electrode and a crystallization prevention layer between the substrate and the ferroelectric crystallization layer. The ferroelectric crystallization layer is at least partially crystallized and includes a dielectric material having ferroelectricity or anti-ferroelectricity. Also, the crystallization prevention layer prevents crystallization in the ferroelectric crystallization layer from being spread toward the substrate.

Electronic device and method of manufacturing the same

A domain switching device includes a channel region, a source region and a drain region connected to the channel region, a gate electrode isolated from contact with the channel region, an anti-ferroelectric layer between the channel region and the gate electrode, a conductive layer between the gate electrode and the anti-ferroelectric layer to contact the anti-ferroelectric layer, and a barrier layer between the anti-ferroelectric layer and the channel region.

Domain switching devices and methods of manufacturing the same

A layer structure including a dielectric layer, a method of manufacturing the layer structure, and an electronic device including the layer structure are disclosed. The layer structure including a lower layer, a dielectric layer, and an upper layer sequentially stacked. The dielectric layer includes sequentially stacked first, second, and third layers, wherein one of the first layer or the third layer is a ferroelectric, the other one is an anti-ferroelectric, and the second layer is an oxide layer. In one example, the dielectric layer may further include a fourth layer on the third layer.

Layer structure including dielectric layer, methods of manufacturing the layer structure, and electronic device including the layer structure

Provided is a semiconductor device including a first semiconductor transistor including a semiconductor channel layer, and a metal-oxide semiconductor channel layer, and having a structure in which a second semiconductor transistor is stacked on the top of the first semiconductor transistor. A gate stack of the second semiconductor transistor and the top of a gate stack of the first semiconductor transistor may overlap by greater than or equal to 90%. The first semiconductor transistor and the second semiconductor transistor may have a similar level of operation characteristics.

Complementary metal oxide semiconductor device

An electronic device includes a seed layer including a two-dimensional (2D) material, and a ferroelectric layer on the seed layer. The ferroelectric layer is configured to be aligned in a direction in which a (111) crystal direction is perpendicular to a top surface of a substrate on which the seed layer is located and/or a top surface of the seed layer.

Electronic devices and methods of manufacturing the same

A semiconductor device includes a first transistor including a first channel layer of a first conductivity type, a second transistor provided in parallel with the first transistor and including a second channel layer of a second conductivity type, and a third transistor stacked on the first and second transistors. The third transistor may include a gate insulating film including a ferroelectric material. The third transistor may include third channel layer and a gate electrode that are spaced apart from each other in a thickness direction with the gate insulating film therebetween.

Semiconductor device including ferroelectric material, neuromorphic circuit including the semiconductor device, and neuromorphic computing apparatus including the neuromorphic circuit

Growing community of inventors

Seoul, South Korea

Jinseong Heo