Samsung Electronics Co., Ltd.

Jinseon Park

Doohwan Lee

Joonsung Kim

Jaekul Lee

Junwoo Myung

A method of manufacturing a fan-out semiconductor package includes forming a frame having a through-hole and including one or more wiring layers; forming a semiconductor chip in the through-hole of the frame; forming an encapsulant covering an upper surface of each of the frame and the semiconductor chip, and filling a space between a wall surface of the through-hole of the frame and a side surface of the semiconductor chip; forming a connection structure below each of the frame and the semiconductor chip; forming a first metal pattern layer on an upper surface of the encapsulant; forming an insulating material on the upper surface of the encapsulant and covering the first metal pattern layer; and forming a second metal pattern layer on the insulating material, a first metal via passing through the insulating material, and a second metal via passing through the insulating material and the encapsulant.

Fan-out semiconductor package

A fan-out semiconductor package includes a semiconductor chip, an encapsulant covering the semiconductor chip, a connection structure disposed below the semiconductor chip, and first and second metal pattern layers disposed on different levels on the semiconductor chip, wherein the first metal pattern layer is provided to electrically connect to an electrical connection member such as a frame, provided for electrical connection of the package in a vertical direction by a path via the second metal pattern layer.

A package module includes a core structure including a dummy member, one or more electronic components disposed around the dummy member, and an insulating material covering at least a portion of each of the dummy member and the electronic components, the core structure including a first penetration hole passing through the dummy member and the insulating material, a semiconductor chip disposed in the first penetration hole and having an active surface on which a connection pad is disposed and an inactive surface, an encapsulant covering at least a portion of each of the core structure and the semiconductor chip and filling at least a portion of the first penetration hole, and a connection structure disposed on the core structure and the active surface and including a redistribution layer electrically connected to the electronic components and the connection pad.

Growing community of inventors

Suwon-si, South Korea

Jinseon Park