Korea Institute of Science and Technology

Hyundai Motor Company

Samsung Electronics Co., Ltd.

Postech Academy-industry Foundation

Kia Motors Corporation

Center of Human-centered Interaction for Coexistence

Lg Electronics Inc.

Lg Chem, Ltd

Seoul National University

Postech Research and Business Development Foundation

Jinseok Kim

Seong Wook Hwang

Jae Chang Kook

Seongwook Ji

Hyun Sik Kwon

Jong Soo Kim

Dong Hwan Hwang

Woo Jin Chang

Tae Whan Kim

Wonmin Cho

Jong Sool Park

Kyeong Hun Lee

Chon Ok Kim

Jin Ho Kim

Hyungdal Park

Hyungjun Kim

Jae-Joon Kim

Jinwoo Jeong

Yulhwa Kim

Ockchul Kim

Yong-Won Song

Minsu Jang

Jun Sik Kim

Bum-Jae You

Sungwook Yang

Taesu Kim

Wonsuk Choi

Sungho Kim

Byung Kook Kim

Inchan Youn

Jong Woong Park

Jun-Kyo Francis Suh

Dami Jeon

Sumin Ahn

Hyun Joon Shin

Woo Hyun Jung

Hyowon Moon

Kyumin Kang

Jungjeong Jo

Sunyoung Jung

Jeiwon Cho

Yeowool Huh

Tae Hyung Kim

Jin Hee Lee

JongSool Park

Kangsoo Seo

Hyu Tae Shim

KyeongHun Lee

Yong Seok Choi

Jong-Chan Lee

Myonghoon Noh

Young Sam Kim

Sang Rok Oh

Keehoon Kim

Eui Sung Yoon

Dusik Park

Hee Sup Shin

Kuiwon Choi

Ki-Don Lee

Seungyup Lee

Seoyoung Yoon

Jaegi Han

Won-suk Choi

Myojin Bang

Minjeong Moon

Minjung Moon

Jiyoon Heo

Eui-Sung Yoon

Hyun-Joon Shin

Seung Seok Lee

Jin Young You

Duk Moon Rho

Jei Won Cho

Sung Wook Yang

Seokwon Kim

Jong Doo Lim

Na Kyung Kim

Hyeonjin Kim

Jun Uk Chu

Jaejoon Kim

Jin Won Seok

Ju Young Jin

Zi Eun Chang

JeiWon Cho

Min Su Jang

Boo Yong Lee

Taeyoung Moon

Yong Beom Kim

Seungmin Jeong

Seungwoon Yang

Boyoung Mun

Eunjung Lim

Kyounghwan Na

A method for processing data based on a neural network including a first layer including axons and a second layer including neurons, includes receiving synaptic weights between the first layer and the second layer; generating presynaptic weights, a number of which is identical to a number of the axons, and postsynaptic weights, a number of which is identical to a number of the synaptic weights, from the synaptic weights; and storing the presynaptic weights and the postsynaptic weights in a synapse memory.

Neuromorphic processor and operating method thereof

Embodiments relate to an IMU sensor and an inertial measurement system comprising same, wherein the IMU sensor comprises: a core body including at least three surfaces each having a surface direction parallel to any one of three axes; a plurality of cantilevers configured to be deformable, one side of each cantilever being coupled to the core body; and a plurality of strain sensors each disposed on the surface of each cantilever, the strain sensors extending along the direction of the other side from one fixed side of the cantilever.

Strain sensor-based IMU sensor, and inertial measurement system comprising same

Embodiments relate to an Inertia Measurement Unit (IMU) sensor that generates strain information including a change in strain based on first output light of a first type of optical fiber sensing unit, calculates acceleration information of an object on which an IMU sensor () is mounted based on the strain information, generates angular velocity information based on output light of a second type of optical fiber sensing unit, and calculates angle information of the object based on the rotational speed information.

Optical fiber sensor-based inertial measurement system

Disclosed are a first memory cell, a second memory cell, and a summing circuit. The first memory cell outputs only one of a first voltage through a first bit line and a second voltage through a second bit line, based on first input data received through a first word line and a second word line and a first weight. The second memory cell outputs only one of a third voltage through the first bit line and a fourth voltage through the second bit line, based on second input data received through a third word line and a fourth word line and a second weight; and the summing circuit generates an output voltage having a level corresponding to a sum of a level of a voltage received through the first bit line and a level of a voltage received through the second bit line.

Electronic device for configuring neural network

In a method of operating a storage device, a first throughput, for transmitting a plurality of write command completion responses to an external host device, is set to an initial value. The plurality of write command completion responses represent an execution of a plurality of write commands received from the external host device. The plurality of write commands are executed. The plurality of write command completion responses are transmitted to the external host device based on the first throughput that is set to the initial value. A plurality of write data are internally stored based on the plurality of write commands. A second throughput, associated with an operation of internally storing the plurality of write data, is monitored during a predetermined first time interval. The first throughput is changed based on the second throughput that is monitored during the predetermined first time interval.

Method of operating storage device for improving QoS latency and storage device performing the same

Disclosed are a first memory cell, a second memory cell, and an amplification circuit. The first memory cell outputs a first voltage through a first bit line or a second voltage through a second bit line, based on first input data received through a first word line and a second word line and a first weight. The second memory cell outputs a third voltage through the first bit line or a fourth voltage through the second bit line, based on second input data received through a third word line and a fourth word line and a second weight. The amplification circuit generates an output voltage having a level corresponding to a sum of a level of a voltage received through the first bit line and a level of a voltage received through the second bit line.

An operating method of a neuromorphic processor which processes data based on a neural network including a first layer including axons and a second layer including neurons includes receiving synaptic weights between the first layer and the second layer, decomposing the synaptic weights into presynaptic weights, a number of which is identical to a number of the axons, and postsynaptic weights, a number of which is identical to a number of the synaptic weights, and storing the presynaptic weights and the postsynaptic weights. A precision of each of the synaptic weights is a first number of bits, a precision of each of the presynaptic weights is a second number of bits, and a precision of each of the postsynaptic weights is a third number of bits. The third number of the bits is smaller than the first number of the bits.

A method of implementing a neural network in a neuromorphic apparatus having a memory and processing circuitry, where the method includes dividing, by the processing circuitry, the neural network into a plurality of sub-networks based on a size of a core of the memory to implement the neural network, initializing, by the processing circuitry, a hyper-parameter used in the sub-networks, and training, by the processing circuitry, the sub-networks by using the hyper-parameter.

Dividing neural networks

A neuromorphic system includes an address translation device that translates an address corresponding to each of synaptic weights between presynaptic neurons and postsynaptic neurons to generate a translation address, and a plurality of synapse memories that store the synaptic weights based on the translation address. The translation address is generated such that at least two of synaptic weights corresponding to each of the postsynaptic neurons are stored in different synapse memories of the plurality of synapse memories and such that at least two of synaptic weights corresponding to each of the presynaptic neurons are stored in different synapse memories.

Neuromorphic system and operating method thereof

A method of performing operations on a plurality of inputs and a same kernel using a delay time by using a same processor, and a neural network device thereof are provided, the neural network device includes input data including a first input and a second input, and a processor configured to obtain a first result by performing operations between the first input and a plurality of kernels, to obtain a second result by performing operations between the second input, which is received at a time delayed by a first interval from a time when the first input is received, and the plurality of kernels, and to obtain output data using the first result and the second result. The neural network device may include neuromorphic hardware and may perform convolutional neural network (CNN) mapping.

Time-delayed convolutions for neural network device and method

Provided is a smart contact lens for non-invasive drug delivery including a platform configured to be worn on an eye, a reservoir installed within the platform, and having a receiving part in which a drug is received, to provide the eye with the drug, an electrode for iontophoresis installed in the reservoir to make iontophoresis work, to provide the eye with the drug from the reservoir, and an activation chip electrically connected to the electrode for iontophoresis to activate iontophoresis.

Smart contact lens for non-invasive drug delivery

Embodiments relate to a torsion sensor device which measures a degree of torsion of a measurement object by using a fiber Bragg gratings (FBG) sensor, the sensor device comprising: an FBG sensor including a sensing unit formed in one section of an elongated optical fiber; and a fixing device for fixing and supporting the FBG sensor to cause displacement of the FBG sensor according to motion of the measurement object, wherein the fixing device includes a bending prevention member to enable the sensing unit to have torsion displacement without bending displacement, according to the motion of the measurement object.

FBG-based torsion sensor device

A probe insertion device for a neural probe structure with a plurality of probes to simultaneously insert the plurality of probes into a nerve includes a nerve holder to fix the nerve surrounding an outer circumference of the nerve, and a probe holder positioned outside in a radial direction of the nerve holder to fixedly support the probes surrounding a circumference of the nerve holder. The probe holder includes a plurality of sections ('probe holder sections') arranged radially with respect to the nerve holder and moveable in a radial direction of the nerve holder, and the plurality of probe holder sections simultaneously moves the plurality of probes toward the nerve holder having fixed the nerve, so that the plurality of probes is simultaneously inserted into the nerve in a radial shape when viewed in a lengthwise direction of the nerve.

Device for inserting neural probes

Disclosed is an electronic device including a display device including a touch sensor and a processor electrically connected to the touch sensor and the display device, wherein the processor is configured to control the electronic device to: display content and a cursor on a first area of the display device, display a touch pad user interface configured to receive a touch input on a second area of the display device, and control the cursor on the first area based on the touch input received through the touch pad user interface displayed on the second area.

Electronic device including display device including touch sensor for controlling a cursor

Provided is a neural probe array including a probe which is insertable into a nerve, the probe having a microchannel which induces the regeneration of the nerve, wherein an electrode is installed within the microchannel and is physically isolated from gliosis, and the microchannel is configured to receive a nerve growth factor for regenerating the nerve, and when the probe is inserted into the nerve, the electrode physically isolated from gliosis accomplishes neural signal acquisition and stimulation.

Chronic implantable neural probe array for neural signal acquisition and stimulation

Growing community of inventors

Seoul, South Korea

Jinseok Kim