Skhynix Inc.

Korea Advanced Institute of Science and Technology

Jino Seo

SeongHwan Cho

Hyukjin Lee

Kyunghyun Kim

A semiconductor device includes a memory cell array including a plurality of memory cells coupled between a multiplicity of word lines and one or more bit lines; and an operation circuit configured to perform a multiplication and accumulation (MAC) operation with one or more first multi-bit data provided from the one or more bit lines and one or more second multi-bit data, wherein a plurality of memory cells coupled to a bit line store a plurality of bits included in a corresponding one of the one or more first multi-bit data, and wherein the memory cell array sequentially provides the plurality of bits included in the corresponding first multi-bit data to the operation circuit.

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Uiwang, South Korea

Jino Seo